All SVE functions cannot be debugged with GDB because of the missing .text declaration in the asm file. #125

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opened 2023-10-09 04:14:24 -05:00 by chenxuqiang · 6 comments
chenxuqiang commented 2023-10-09 04:14:24 -05:00 (Migrated from github.com)

I found that all SVE functions cannot be debugged with GDB. This is because the code segment identifier of .text is missing in the SVE function code implementation. As a result, GDB cannot find executable assembly code. You can use the objdump -d to verify this problem:

# objdump -d sm3_mb/aarch64/sm3_mb_sve.o 

sm3_mb/aarch64/sm3_mb_sve.o:     file format elf64-littleaarch64

[no assembler contents of executable sections]

If we add .text to the sm3_mb/aarch64/sm3_mb_sve.S:

...
 60 #include "sm3_sve_common.S"
 61 
 62 .text            // <--- this line
 63 /* int sm3_mb_sve_max_lanes()
 64  * return : max lanes of SVE vector
 65  */
 66         .global sm3_mb_sve_max_lanes
 67         .type sm3_mb_sve_max_lanes, %function
 68 sm3_mb_sve_max_lanes:
...

We can see:

sm3_mb/aarch64/sm3_mb_sve.o:     file format elf64-littleaarch64


Disassembly of section .text:

0000000000000000 <sm3_mb_sve_max_lanes>:
       0:       04a0e3e0        cntw    x0
       4:       d65f03c0        ret

0000000000000008 <sm3_mb_sve>:
        8:       3401bf80        cbz     w0, 37f8 <sm3_mb_sve+0x37f0>
        c:       6dbc27e8        stp     d8, d9, [sp, #-64]!
      10:       6d012fea         stp     d10, d11, [sp, #16]
      14:       6d0237ec        stp     d12, d13, [sp, #32]
      18:       6d033fee        stp     d14, d15, [sp, #48]
      1c:       910003ea        mov     x10, sp
      20:       52800007        mov     w7, #0x0
     ...

and use GDB Debug this function:

Breakpoint 1, sm3_mb_sve_max_lanes () at sm3_mb/aarch64/sm3_mb_sve.S:69
69		cntw	x0
(gdb) l
66		.global sm3_mb_sve_max_lanes
67		.type sm3_mb_sve_max_lanes, %function
68	sm3_mb_sve_max_lanes:
69		cntw	x0
70		ret
71		.size sm3_mb_sve_max_lanes, .-sm3_mb_sve_max_lanes

So I think we should add .text for all SVE functions, including: md5_mb_sve.S, mh_sha1_block_sve.S, sm3_mb_sve.S. and and should be followed by #inlude "xxxxx.S".

I found that all SVE functions cannot be debugged with GDB. This is because the code segment identifier of `.text` is missing in the SVE function code implementation. As a result, GDB cannot find executable assembly code. You can use the `objdump -d` to verify this problem: ```sh # objdump -d sm3_mb/aarch64/sm3_mb_sve.o sm3_mb/aarch64/sm3_mb_sve.o: file format elf64-littleaarch64 [no assembler contents of executable sections] ``` If we add `.text` to the sm3_mb/aarch64/sm3_mb_sve.S: ```asm ... 60 #include "sm3_sve_common.S" 61 62 .text // <--- this line 63 /* int sm3_mb_sve_max_lanes() 64 * return : max lanes of SVE vector 65 */ 66 .global sm3_mb_sve_max_lanes 67 .type sm3_mb_sve_max_lanes, %function 68 sm3_mb_sve_max_lanes: ... ``` We can see: ```sh sm3_mb/aarch64/sm3_mb_sve.o: file format elf64-littleaarch64 Disassembly of section .text: 0000000000000000 <sm3_mb_sve_max_lanes>: 0: 04a0e3e0 cntw x0 4: d65f03c0 ret 0000000000000008 <sm3_mb_sve>: 8: 3401bf80 cbz w0, 37f8 <sm3_mb_sve+0x37f0> c: 6dbc27e8 stp d8, d9, [sp, #-64]! 10: 6d012fea stp d10, d11, [sp, #16] 14: 6d0237ec stp d12, d13, [sp, #32] 18: 6d033fee stp d14, d15, [sp, #48] 1c: 910003ea mov x10, sp 20: 52800007 mov w7, #0x0 ... ``` and use GDB Debug this function: ``` Breakpoint 1, sm3_mb_sve_max_lanes () at sm3_mb/aarch64/sm3_mb_sve.S:69 69 cntw x0 (gdb) l 66 .global sm3_mb_sve_max_lanes 67 .type sm3_mb_sve_max_lanes, %function 68 sm3_mb_sve_max_lanes: 69 cntw x0 70 ret 71 .size sm3_mb_sve_max_lanes, .-sm3_mb_sve_max_lanes ``` So I think we should add `.text` for all SVE functions, including: `md5_mb_sve.S`, `mh_sha1_block_sve.S`, `sm3_mb_sve.S`. and and should be followed by `#inlude "xxxxx.S"`.
pablodelara commented 2023-10-09 06:13:59 -05:00 (Migrated from github.com)

Thanks for reporting @chenxuqiang. Anyone from ARM that can review this issue and issue #124? Also, @chenxuqiang, feel free to submit a PR with these changes.

Thanks for reporting @chenxuqiang. Anyone from ARM that can review this issue and issue #124? Also, @chenxuqiang, feel free to submit a PR with these changes.
docularxu commented 2023-11-27 07:29:36 -06:00 (Migrated from github.com)

This issue relates to gcc (or GNU as)'s default behavior actually. It's not a SVE assembly issue. I explained in https://github.com/intel/isa-l_crypto/pull/127#issuecomment-1827812405

I would suggest to add '.text' declaration explicitly in all .S files where it's needed.

This issue relates to gcc (or GNU as)'s default behavior actually. It's not a SVE assembly issue. I explained in https://github.com/intel/isa-l_crypto/pull/127#issuecomment-1827812405 I would suggest to add '.text' declaration explicitly in all .S files where it's needed.
pablodelara commented 2024-03-27 02:46:36 -05:00 (Migrated from github.com)

@chenxuqiang, could you look into the other .S files?

@chenxuqiang, could you look into the other .S files?
chenxuqiang commented 2024-03-27 20:08:10 -05:00 (Migrated from github.com)

Thanks @docularxu @pablodelara , I'm going to fix it before April 7th.

Thanks @docularxu @pablodelara , I'm going to fix it before April 7th.
pablodelara commented 2024-03-28 03:49:05 -05:00 (Migrated from github.com)

Thanks @chenxuqiang!

Thanks @chenxuqiang!
pablodelara commented 2024-04-21 03:21:19 -05:00 (Migrated from github.com)

@chenxuqiang We are looking at a release next month, so could you look into this as soon as you can? Thanks!

@chenxuqiang We are looking at a release next month, so could you look into this as soon as you can? Thanks!
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