Easier checks for pre-conditions (wrt hardware capabilities) #2

Open
opened 2016-10-05 12:13:09 -05:00 by surendarchandra · 3 comments
surendarchandra commented 2016-10-05 12:13:09 -05:00 (Migrated from github.com)

I know that each function has a set of preconditions, it would be great if we can easily check for those at run time (instead of rolling our own custom checkers). E.g., AES key expansion adapts to AVX or SSE. However, it also requires AES. Ran into a setup which used Haswell but with AES-NI disabled in BIOS (not sure why this is still the default with certain vendors). Got an illegal instruction error. Thanks

I know that each function has a set of preconditions, it would be great if we can easily check for those at run time (instead of rolling our own custom checkers). E.g., AES key expansion adapts to AVX or SSE. However, it also requires AES. Ran into a setup which used Haswell but with AES-NI disabled in BIOS (not sure why this is still the default with certain vendors). Got an illegal instruction error. Thanks
gbtucker commented 2016-10-05 20:53:49 -05:00 (Migrated from github.com)

Almost all functions in the library have base functions that are highly portable and few minimum requirements so the multi-binary interface has few restrictions. The block ciphers in isa-l_crypto are one exception to this and do require AES-NI as a minimum.

Some early CRB boards have AES-NI disabled in BIOS but do re-enable for production boards.

Almost all functions in the library have base functions that are highly portable and few minimum requirements so the multi-binary interface has few restrictions. The block ciphers in isa-l_crypto are one exception to this and do require AES-NI as a minimum. Some early CRB boards have AES-NI disabled in BIOS but do re-enable for production boards.
surendarchandra commented 2016-10-06 04:12:58 -05:00 (Migrated from github.com)

Looks like Super-Micros disable them by default.

I use a CPUID based lookup: ecx, bit 25 to detect AES.

Looks like Super-Micros disable them by default. I use a CPUID based lookup: ecx, bit 25 to detect AES.
ilmarmors commented 2017-10-24 03:05:07 -05:00 (Migrated from github.com)

I have bumped into this issue as well - somebody run Java JNI wrapper for isa-l_crypto I wrote on computer without AES instructions. That ended ugly with Java core dump. I will need to write check for AES support. If there would be something simple like that added to isa-l_crypto, I would use it for sure.

I have bumped into this issue as well - somebody run Java JNI wrapper for isa-l_crypto I wrote on computer without AES instructions. That ended ugly with Java core dump. I will need to write check for AES support. If there would be something simple like that added to isa-l_crypto, I would use it for sure.
Sign in to join this conversation.
No milestone
No assignees
1 participant
Notifications
Due date
The due date is invalid or out of range. Please use the format "yyyy-mm-dd".

No due date set.

Dependencies

No dependencies set

Reference
gh-intel/isa-l_crypto#2
No description provided.