[BUG] Clock div for peri_clock seems not to be working #1037
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gh-raspberrypi/pico-sdk#1037
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Hallo there,
I'll expect the clock div for the
clock_perinot to be working correctly.Test case 1:
clock_sys = src <- PLL_USB, src_freq <- 48MHz, target_freq <- 8MHz: works
clock_peri = src <- clock_sys, src_freq <- 8MHz, target_freq <- 8MHz: works
Test case 2:
clock_sys = src <- PLL_USB, src_freq <- 48MHz, target_freq <- 48MHz: works
clock_peri = src <- clock_sys, src_freq <- 48MHz, target_freq <- 8MHz: does not work
I tested test case 2 with 24Mhz, 8MHz and 1 MHz and non of the seems to set the target freq correctly.
Also tried to change the clock src for the
clock_perito PLL_USB also does not work.As i understand it from the datasheet the clock div for the
clock_perishould work as the clock div for theclock_sysbut this seems not to be the case, the
peri_clockis unchanged after the the reconfig.Test code:
Output with default baud of 115200
Output when baudrate is set to a 1/6 of the default speed after the second
stdio_init_all();First
measure_freqs()cuts of because uart is not done printing until the clocks is re-configuringclk_peridoes not have a divider. You'll notice there is no listing for CLK_PERI_DIV in the datasheet, since there is no such register.The reason your first testcase works is that you are attaching
clk_peritoclk_sys, andclk_sysis divided.In the second example, you are attaching
clk_peritoclk_sysand then attempting to divide it further, which is impossible since there is no such clock divider.I just stumbled over this too while trying to get the UART down to just 40 baud which isn't possible with the default 125mhz
clk_peri.However i noticed that this bug goes a bit deeper than just the divider not working.
The
clock_configurefunction incorrectly reports success even though it did nothing and whenclock_get_hzis used it reports that the frequency of the clock has changed while the actual measured frequency returned byfrequency_count_khzshows that it didn't change.Since
uart_inituses the incorrect frequency reported byclock_get_hzto calculate the clock divider i got a ton of funky baud rates and couldn't figure out why for quite a while.Oh and also the picture in the documentation that shows the layout of the clock structure has a divider in the path of
clk_periwhich does not exist. (Image on page 181)Here is a code snippet to test what i described:
And the output:
closing, this as its not clear if there is actually an issue that needs to be addressed; feel free to reopen
@kilograham Sorry to be so blunt but i explained the issue very clearly as well as the effects of it so i don't understand why this was 1: ignored and 2: just closed like that without anyone looking at it and bothering to verify what was reported or at least asking for clarification.
Since nothing has changed about this issue in SDK version 1.5.0 this has to be reopened.
Output of the same code snipped i posted above:
Here is what needs to be changed:
1: On page 181 the Figure 28 needs to have its box with the division sign removed in the path of
clk_peri. (build-date: 2023-03-02, build-version: ae3b121-clean)2:
clock_configureshould not report success when the divider forclk_periis changed as there is nothing to change since that register does not even exist3:
clock_configureshould not modify the value ofconfigured_freq(which is used byclock_get_hzand lots of other stuff like baud rate calculation for example) since the frequency didn't change4: (probably unrealistic) The struct
clock_hw_tshould not contain properties that don't exist for the given clock or changing the silicon so that all clock paths are the same and the divider etc. can be used no matter what clock is being configured.Can you create a separate issue for this at https://github.com/raspberrypi/pico-feedback please? (as that is where we track issues with the Pico databooks)
Took me a while to get around to looking at this again. There is no need for yet another issue since someone else already noticed that something isn't right in the diagram: here
They were thinking that the diagram is correct and were wondering why the documentation is missing elsewhere.
I'll add the information from this issue and a link here in theirs as this should be fixed together.