SVD missing atomic alias registers #2830

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opened 2026-02-11 20:04:16 -06:00 by mrexodia · 3 comments

mrexodia commented 2026-02-11 20:04:16 -06:00 (Migrated from github.com)

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Stumbled on this while reversing some RP2350 RISC-V firmware for a CTF challenge.

// Register address offsets for atomic RMW aliases
#define REG_ALIAS_RW_BITS  (_u(0x0) << _u(12))
#define REG_ALIAS_XOR_BITS (_u(0x1) << _u(12))
#define REG_ALIAS_SET_BITS (_u(0x2) << _u(12))
#define REG_ALIAS_CLR_BITS (_u(0x3) << _u(12))

For example, RP2350.svd defines PADS_BANK0 at 0x40038000, but does not define its atomic alias views:

• 0x40039000 (XOR)
• 0x4003A000 (SET)
• 0x4003B000 (CLR)

No idea if this patch is technically correct as I know nothing about SVD files:

--- /Users/me/Downloads/RP2350.svd	2026-02-12 00:34:50
+++ /Users/me/Downloads/RP2350.atomic-alias.patched.svd	2026-02-12 02:52:57
@@ -7594,6 +7594,21 @@
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="PADS_BANK0">
+        <name>PADS_BANK0_XOR</name>
+        <description>Atomic XOR alias view of PADS_BANK0 (+0x1000)</description>
+        <baseAddress>0x40039000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PADS_BANK0">
+        <name>PADS_BANK0_SET</name>
+        <description>Atomic SET alias view of PADS_BANK0 (+0x2000)</description>
+        <baseAddress>0x4003A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PADS_BANK0">
+        <name>PADS_BANK0_CLR</name>
+        <description>Atomic CLR alias view of PADS_BANK0 (+0x3000)</description>
+        <baseAddress>0x4003B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>PADS_QSPI</name>
         <baseAddress>0x40040000</baseAddress>

It fixes the decompilation in IDA though:

void __fastcall gpio_set_pulls(uint gpio, bool up, bool down)
{
  PADS_BANK0_XOR_GPIO0[gpio] = ((unsigned __int8)((4 * down) | (8 * up))
                              ^ (unsigned __int8)PADS_BANK0_GPIO0[gpio])
                             & 0xC;
}

Disassembly for reference:

.text:1000042E             # void gpio_set_pulls(uint gpio, bool up, bool down)
.text:1000042E                             # public gpio_set_pulls
.text:1000042E             gpio_set_pulls:                         # CODE XREF: main+64↑p
.text:1000042E                                                     # main+6C↑p
.text:1000042E B7 87 03 40                 li              a5, 40038004h
.text:1000042E 91 07
.text:10000434 33 45 F5 20                 sh2add          a0, a0, a5
.text:10000438 1C 41                       c.lw            a5, 0(a0)
.text:1000043A 8E 05                       c.slli          a1, a1, 3
.text:1000043C 0A 06                       c.slli          a2, a2, 2
.text:1000043E 4D 8E                       c.or            a2, a2, a1
.text:10000440 3D 8E                       c.xor           a2, a2, a5
.text:10000442 85 67                       c.lui           a5, 1
.text:10000444 31 8A                       c.andi          a2, a2, 0Ch
.text:10000446 3E 95                       c.add           a0, a0, a5
.text:10000448 10 C1                       c.sw            a2, 0(a0)
.text:1000044A 82 80                       c.ret
.text:1000044A             # End of function gpio_set_pulls

Relevant section from the datasheet:

2.1.3. Atomic register access
Each peripheral register block is allocated 4 kB of address space, with registers accessed using one of 4 methods,
selected by address decode.
• Addr + 0x0000 : normal read write access
• Addr + 0x1000 : atomic XOR on write
• Addr + 0x2000 : atomic bitmask set on write
• Addr + 0x3000 : atomic bitmask clear on write
This allows software to modify individual fields of a control register without performing a read-modify-write sequence.
Instead, the peripheral itself modifies its contents in-place. Without this capability, it is difficult to safely access IO
registers when an interrupt service routine is concurrent with code running in the foreground, or when the two
processors run code in parallel.
The four atomic access aliases occupy a total of 16 kB. Native atomic writes take the same number of clock cycles as
normal writes. Most peripherals on RP2350 provide this functionality natively, but some peripherals (I2C, UART, SPI and
SSI) add this functionality using a bus interposer. The bus interposer translates upstream atomic writes into
downstream read-modify-write sequences at the boundary of the peripheral, at the cost of additional clock cycles.
Atomic writes that use a bus interposer take two additional clock cycles compared to normal writes.
The following registers do not support atomic register access:
• SIO (Section 3.1), though some individual registers (for example, GPIO) have set, clear, and XOR aliases.
• Any register accessed through the self-hosted CoreSight window, including Arm Mem-APs and the RISC-V Debug
Module.
• Standard Arm control registers on the Cortex-M33 private peripheral bus (PPB), except for Raspberry Pi-specific
registers on the EPPB.
• OTP programming registers accessed through the SBPI bridge.

Stumbled on this while reversing some RP2350 RISC-V firmware for a CTF challenge. ```c // Register address offsets for atomic RMW aliases #define REG_ALIAS_RW_BITS (_u(0x0) << _u(12)) #define REG_ALIAS_XOR_BITS (_u(0x1) << _u(12)) #define REG_ALIAS_SET_BITS (_u(0x2) << _u(12)) #define REG_ALIAS_CLR_BITS (_u(0x3) << _u(12)) ``` For example, RP2350.svd defines PADS_BANK0 at 0x40038000, but does not define its atomic alias views: - 0x40039000 (XOR) - 0x4003A000 (SET) - 0x4003B000 (CLR) No idea if this patch is technically correct as I know nothing about SVD files: ```diff --- /Users/me/Downloads/RP2350.svd 2026-02-12 00:34:50 +++ /Users/me/Downloads/RP2350.atomic-alias.patched.svd 2026-02-12 02:52:57 @@ -7594,6 +7594,21 @@ </register> </registers> </peripheral> + <peripheral derivedFrom="PADS_BANK0"> + <name>PADS_BANK0_XOR</name> + <description>Atomic XOR alias view of PADS_BANK0 (+0x1000)</description> + <baseAddress>0x40039000</baseAddress> + </peripheral> + <peripheral derivedFrom="PADS_BANK0"> + <name>PADS_BANK0_SET</name> + <description>Atomic SET alias view of PADS_BANK0 (+0x2000)</description> + <baseAddress>0x4003A000</baseAddress> + </peripheral> + <peripheral derivedFrom="PADS_BANK0"> + <name>PADS_BANK0_CLR</name> + <description>Atomic CLR alias view of PADS_BANK0 (+0x3000)</description> + <baseAddress>0x4003B000</baseAddress> + </peripheral> <peripheral> <name>PADS_QSPI</name> <baseAddress>0x40040000</baseAddress> ``` It fixes the decompilation in IDA though: ```c void __fastcall gpio_set_pulls(uint gpio, bool up, bool down) { PADS_BANK0_XOR_GPIO0[gpio] = ((unsigned __int8)((4 * down) | (8 * up)) ^ (unsigned __int8)PADS_BANK0_GPIO0[gpio]) & 0xC; } ``` Disassembly for reference: ``` .text:1000042E # void gpio_set_pulls(uint gpio, bool up, bool down) .text:1000042E # public gpio_set_pulls .text:1000042E gpio_set_pulls: # CODE XREF: main+64↑p .text:1000042E # main+6C↑p .text:1000042E B7 87 03 40 li a5, 40038004h .text:1000042E 91 07 .text:10000434 33 45 F5 20 sh2add a0, a0, a5 .text:10000438 1C 41 c.lw a5, 0(a0) .text:1000043A 8E 05 c.slli a1, a1, 3 .text:1000043C 0A 06 c.slli a2, a2, 2 .text:1000043E 4D 8E c.or a2, a2, a1 .text:10000440 3D 8E c.xor a2, a2, a5 .text:10000442 85 67 c.lui a5, 1 .text:10000444 31 8A c.andi a2, a2, 0Ch .text:10000446 3E 95 c.add a0, a0, a5 .text:10000448 10 C1 c.sw a2, 0(a0) .text:1000044A 82 80 c.ret .text:1000044A # End of function gpio_set_pulls ``` Relevant section from the datasheet: 2.1.3. Atomic register access Each peripheral register block is allocated 4 kB of address space, with registers accessed using one of 4 methods, selected by address decode. • Addr + 0x0000 : normal read write access • Addr + 0x1000 : atomic XOR on write • Addr + 0x2000 : atomic bitmask set on write • Addr + 0x3000 : atomic bitmask clear on write This allows software to modify individual fields of a control register without performing a read-modify-write sequence. Instead, the peripheral itself modifies its contents in-place. Without this capability, it is difficult to safely access IO registers when an interrupt service routine is concurrent with code running in the foreground, or when the two processors run code in parallel. The four atomic access aliases occupy a total of 16 kB. Native atomic writes take the same number of clock cycles as normal writes. Most peripherals on RP2350 provide this functionality natively, but some peripherals (I2C, UART, SPI and SSI) add this functionality using a bus interposer. The bus interposer translates upstream atomic writes into downstream read-modify-write sequences at the boundary of the peripheral, at the cost of additional clock cycles. Atomic writes that use a bus interposer take two additional clock cycles compared to normal writes. The following registers do not support atomic register access: • SIO (Section 3.1), though some individual registers (for example, GPIO) have set, clear, and XOR aliases. • Any register accessed through the self-hosted CoreSight window, including Arm Mem-APs and the RISC-V Debug Module. • Standard Arm control registers on the Cortex-M33 private peripheral bus (PPB), except for Raspberry Pi-specific registers on the EPPB. • OTP programming registers accessed through the SBPI bridge.

lurch commented 2026-02-12 04:05:17 -06:00 (Migrated from github.com)

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No idea if this patch is technically correct as I know nothing about SVD files:

Our SVD files (there's one for RP2040 and RP2350) are autogenerated using internal tooling. You can learn more about SVD at https://arm-software.github.io/CMSIS_5/SVD/html/index.html

I don't know if we'll be making your suggested change to our SVD files, as I guess we'd need to do that for all peripherals, not just PADS_BANK0. And as you've highlighted, there are a lot of special-exceptions which would make this tricky to get right.

> No idea if this patch is technically correct as I know nothing about SVD files: Our SVD files (there's one for [RP2040](https://github.com/raspberrypi/pico-sdk/blob/master/src/rp2040/hardware_regs/RP2040.svd) and [RP2350](https://github.com/raspberrypi/pico-sdk/blob/master/src/rp2350/hardware_regs/RP2350.svd)) are autogenerated using internal tooling. You can learn more about SVD at https://arm-software.github.io/CMSIS_5/SVD/html/index.html I don't know if we'll be making your suggested change to our SVD files, as I guess we'd need to do that for **all** peripherals, not just `PADS_BANK0`. And as you've highlighted, there are a lot of special-exceptions which would make this tricky to get right.

mrexodia commented 2026-02-12 06:06:11 -06:00 (Migrated from github.com)

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I don't know if we'll be making your suggested change to our SVD files, as I guess we'd need to do that for all peripherals, not just PADS_BANK0. And as you've highlighted, there are a lot of special-exceptions which would make this tricky to get right.

I tried looking at the exceptions, but the datasheet is very unclear about it:

The following registers do not support atomic register access:

• SIO (Section 3.1), though some individual registers (for example, GPIO) have set, clear, and XOR aliases.

It says "for example, GPIO" but I cannot find any other examples (except maybe ACCESSCTRL?). I did some attempt myself to include the stuff actively used by the pico-sdk (which means you would encounter it while debugging):

More complete RP2350 SVD

diff --git a/atomic_regs.diff b/atomic_regs.diff
index c8b752c..e69de29 100644
--- a/atomic_regs.diff
+++ b/atomic_regs.diff
@@ -1,928 +0,0 @@
-diff --git a/src/rp2350/hardware_regs/RP2350.svd b/src/rp2350/hardware_regs/RP2350.svd
-index dc2e1f2..70b21dc 100644
---- a/src/rp2350/hardware_regs/RP2350.svd
-+++ b/src/rp2350/hardware_regs/RP2350.svd
-@@ -528,6 +528,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="RESETS">
-+        <name>RESETS_XOR</name>
-+        <description>Atomic XOR alias view of RESETS (+0x1000)</description>
-+        <baseAddress>0x40021000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="RESETS">
-+        <name>RESETS_SET</name>
-+        <description>Atomic SET alias view of RESETS (+0x2000)</description>
-+        <baseAddress>0x40022000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="RESETS">
-+        <name>RESETS_CLR</name>
-+        <description>Atomic CLR alias view of RESETS (+0x3000)</description>
-+        <baseAddress>0x40023000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>PSM</name>
-         <baseAddress>0x40018000</baseAddress>
-@@ -1071,6 +1086,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="PSM">
-+        <name>PSM_XOR</name>
-+        <description>Atomic XOR alias view of PSM (+0x1000)</description>
-+        <baseAddress>0x40019000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PSM">
-+        <name>PSM_SET</name>
-+        <description>Atomic SET alias view of PSM (+0x2000)</description>
-+        <baseAddress>0x4001A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PSM">
-+        <name>PSM_CLR</name>
-+        <description>Atomic CLR alias view of PSM (+0x3000)</description>
-+        <baseAddress>0x4001B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>CLOCKS</name>
-         <baseAddress>0x40010000</baseAddress>
-@@ -3621,6 +3651,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="CLOCKS">
-+        <name>CLOCKS_XOR</name>
-+        <description>Atomic XOR alias view of CLOCKS (+0x1000)</description>
-+        <baseAddress>0x40011000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="CLOCKS">
-+        <name>CLOCKS_SET</name>
-+        <description>Atomic SET alias view of CLOCKS (+0x2000)</description>
-+        <baseAddress>0x40012000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="CLOCKS">
-+        <name>CLOCKS_CLR</name>
-+        <description>Atomic CLR alias view of CLOCKS (+0x3000)</description>
-+        <baseAddress>0x40013000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>TICKS</name>
-         <baseAddress>0x40108000</baseAddress>
-@@ -3908,6 +3953,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="TICKS">
-+        <name>TICKS_XOR</name>
-+        <description>Atomic XOR alias view of TICKS (+0x1000)</description>
-+        <baseAddress>0x40109000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TICKS">
-+        <name>TICKS_SET</name>
-+        <description>Atomic SET alias view of TICKS (+0x2000)</description>
-+        <baseAddress>0x4010A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TICKS">
-+        <name>TICKS_CLR</name>
-+        <description>Atomic CLR alias view of TICKS (+0x3000)</description>
-+        <baseAddress>0x4010B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>PADS_BANK0</name>
-         <baseAddress>0x40038000</baseAddress>
-@@ -7594,6 +7654,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="PADS_BANK0">
-+        <name>PADS_BANK0_XOR</name>
-+        <description>Atomic XOR alias view of PADS_BANK0 (+0x1000)</description>
-+        <baseAddress>0x40039000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PADS_BANK0">
-+        <name>PADS_BANK0_SET</name>
-+        <description>Atomic SET alias view of PADS_BANK0 (+0x2000)</description>
-+        <baseAddress>0x4003A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PADS_BANK0">
-+        <name>PADS_BANK0_CLR</name>
-+        <description>Atomic CLR alias view of PADS_BANK0 (+0x3000)</description>
-+        <baseAddress>0x4003B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>PADS_QSPI</name>
-         <baseAddress>0x40040000</baseAddress>
-@@ -8068,6 +8143,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="PADS_QSPI">
-+        <name>PADS_QSPI_XOR</name>
-+        <description>Atomic XOR alias view of PADS_QSPI (+0x1000)</description>
-+        <baseAddress>0x40041000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PADS_QSPI">
-+        <name>PADS_QSPI_SET</name>
-+        <description>Atomic SET alias view of PADS_QSPI (+0x2000)</description>
-+        <baseAddress>0x40042000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PADS_QSPI">
-+        <name>PADS_QSPI_CLR</name>
-+        <description>Atomic CLR alias view of PADS_QSPI (+0x3000)</description>
-+        <baseAddress>0x40043000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>IO_QSPI</name>
-         <baseAddress>0x40030000</baseAddress>
-@@ -11473,6 +11563,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="IO_QSPI">
-+        <name>IO_QSPI_XOR</name>
-+        <description>Atomic XOR alias view of IO_QSPI (+0x1000)</description>
-+        <baseAddress>0x40031000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="IO_QSPI">
-+        <name>IO_QSPI_SET</name>
-+        <description>Atomic SET alias view of IO_QSPI (+0x2000)</description>
-+        <baseAddress>0x40032000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="IO_QSPI">
-+        <name>IO_QSPI_CLR</name>
-+        <description>Atomic CLR alias view of IO_QSPI (+0x3000)</description>
-+        <baseAddress>0x40033000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>IO_BANK0</name>
-         <baseAddress>0x40028000</baseAddress>
-@@ -32772,6 +32877,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="IO_BANK0">
-+        <name>IO_BANK0_XOR</name>
-+        <description>Atomic XOR alias view of IO_BANK0 (+0x1000)</description>
-+        <baseAddress>0x40029000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="IO_BANK0">
-+        <name>IO_BANK0_SET</name>
-+        <description>Atomic SET alias view of IO_BANK0 (+0x2000)</description>
-+        <baseAddress>0x4002A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="IO_BANK0">
-+        <name>IO_BANK0_CLR</name>
-+        <description>Atomic CLR alias view of IO_BANK0 (+0x3000)</description>
-+        <baseAddress>0x4002B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>SYSINFO</name>
-         <baseAddress>0x40000000</baseAddress>
-@@ -32869,6 +32989,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="SYSINFO">
-+        <name>SYSINFO_XOR</name>
-+        <description>Atomic XOR alias view of SYSINFO (+0x1000)</description>
-+        <baseAddress>0x40001000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SYSINFO">
-+        <name>SYSINFO_SET</name>
-+        <description>Atomic SET alias view of SYSINFO (+0x2000)</description>
-+        <baseAddress>0x40002000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SYSINFO">
-+        <name>SYSINFO_CLR</name>
-+        <description>Atomic CLR alias view of SYSINFO (+0x3000)</description>
-+        <baseAddress>0x40003000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>SHA256</name>
-         <description>SHA-256 hash function implementation</description>
-@@ -33080,6 +33215,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="SHA256">
-+        <name>SHA256_XOR</name>
-+        <description>Atomic XOR alias view of SHA256 (+0x1000)</description>
-+        <baseAddress>0x400F9000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SHA256">
-+        <name>SHA256_SET</name>
-+        <description>Atomic SET alias view of SHA256 (+0x2000)</description>
-+        <baseAddress>0x400FA000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SHA256">
-+        <name>SHA256_CLR</name>
-+        <description>Atomic CLR alias view of SHA256 (+0x3000)</description>
-+        <baseAddress>0x400FB000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>HSTX_FIFO</name>
-         <description>FIFO status and write access for HSTX</description>
-@@ -33135,6 +33285,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="HSTX_FIFO">
-+        <name>HSTX_FIFO_XOR</name>
-+        <description>Atomic XOR alias view of HSTX_FIFO (+0x1000)</description>
-+        <baseAddress>0x50601000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="HSTX_FIFO">
-+        <name>HSTX_FIFO_SET</name>
-+        <description>Atomic SET alias view of HSTX_FIFO (+0x2000)</description>
-+        <baseAddress>0x50602000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="HSTX_FIFO">
-+        <name>HSTX_FIFO_CLR</name>
-+        <description>Atomic CLR alias view of HSTX_FIFO (+0x3000)</description>
-+        <baseAddress>0x50603000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>HSTX_CTRL</name>
-         <description>Control interface to HSTX. For FIFO write access and status, see the HSTX_FIFO register block.</description>
-@@ -33568,6 +33733,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="HSTX_CTRL">
-+        <name>HSTX_CTRL_XOR</name>
-+        <description>Atomic XOR alias view of HSTX_CTRL (+0x1000)</description>
-+        <baseAddress>0x400C1000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="HSTX_CTRL">
-+        <name>HSTX_CTRL_SET</name>
-+        <description>Atomic SET alias view of HSTX_CTRL (+0x2000)</description>
-+        <baseAddress>0x400C2000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="HSTX_CTRL">
-+        <name>HSTX_CTRL_CLR</name>
-+        <description>Atomic CLR alias view of HSTX_CTRL (+0x3000)</description>
-+        <baseAddress>0x400C3000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>EPPB</name>
-         <description>Cortex-M33 EPPB vendor register block for RP2350</description>
-@@ -42695,6 +42875,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="QMI">
-+        <name>QMI_XOR</name>
-+        <description>Atomic XOR alias view of QMI (+0x1000)</description>
-+        <baseAddress>0x400D1000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="QMI">
-+        <name>QMI_SET</name>
-+        <description>Atomic SET alias view of QMI (+0x2000)</description>
-+        <baseAddress>0x400D2000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="QMI">
-+        <name>QMI_CLR</name>
-+        <description>Atomic CLR alias view of QMI (+0x3000)</description>
-+        <baseAddress>0x400D3000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>XIP_CTRL</name>
-         <description>QSPI flash execute-in-place block</description>
-@@ -42924,6 +43119,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="XIP_CTRL">
-+        <name>XIP_CTRL_XOR</name>
-+        <description>Atomic XOR alias view of XIP_CTRL (+0x1000)</description>
-+        <baseAddress>0x400C9000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="XIP_CTRL">
-+        <name>XIP_CTRL_SET</name>
-+        <description>Atomic SET alias view of XIP_CTRL (+0x2000)</description>
-+        <baseAddress>0x400CA000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="XIP_CTRL">
-+        <name>XIP_CTRL_CLR</name>
-+        <description>Atomic CLR alias view of XIP_CTRL (+0x3000)</description>
-+        <baseAddress>0x400CB000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>XIP_AUX</name>
-         <description>Auxiliary DMA access to XIP FIFOs, via fast AHB bus access</description>
-@@ -43028,6 +43238,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="XIP_AUX">
-+        <name>XIP_AUX_XOR</name>
-+        <description>Atomic XOR alias view of XIP_AUX (+0x1000)</description>
-+        <baseAddress>0x50501000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="XIP_AUX">
-+        <name>XIP_AUX_SET</name>
-+        <description>Atomic SET alias view of XIP_AUX (+0x2000)</description>
-+        <baseAddress>0x50502000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="XIP_AUX">
-+        <name>XIP_AUX_CLR</name>
-+        <description>Atomic CLR alias view of XIP_AUX (+0x3000)</description>
-+        <baseAddress>0x50503000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>SYSCFG</name>
-         <description>Register block for various chip control signals</description>
-@@ -43245,6 +43470,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="SYSCFG">
-+        <name>SYSCFG_XOR</name>
-+        <description>Atomic XOR alias view of SYSCFG (+0x1000)</description>
-+        <baseAddress>0x40009000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SYSCFG">
-+        <name>SYSCFG_SET</name>
-+        <description>Atomic SET alias view of SYSCFG (+0x2000)</description>
-+        <baseAddress>0x4000A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SYSCFG">
-+        <name>SYSCFG_CLR</name>
-+        <description>Atomic CLR alias view of SYSCFG (+0x3000)</description>
-+        <baseAddress>0x4000B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>XOSC</name>
-         <description>Controls the crystal oscillator</description>
-@@ -43423,6 +43663,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="XOSC">
-+        <name>XOSC_XOR</name>
-+        <description>Atomic XOR alias view of XOSC (+0x1000)</description>
-+        <baseAddress>0x40049000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="XOSC">
-+        <name>XOSC_SET</name>
-+        <description>Atomic SET alias view of XOSC (+0x2000)</description>
-+        <baseAddress>0x4004A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="XOSC">
-+        <name>XOSC_CLR</name>
-+        <description>Atomic CLR alias view of XOSC (+0x3000)</description>
-+        <baseAddress>0x4004B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>PLL_SYS</name>
-         <baseAddress>0x40050000</baseAddress>
-@@ -43604,6 +43859,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="PLL_SYS">
-+        <name>PLL_SYS_XOR</name>
-+        <description>Atomic XOR alias view of PLL_SYS (+0x1000)</description>
-+        <baseAddress>0x40051000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PLL_SYS">
-+        <name>PLL_SYS_SET</name>
-+        <description>Atomic SET alias view of PLL_SYS (+0x2000)</description>
-+        <baseAddress>0x40052000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PLL_SYS">
-+        <name>PLL_SYS_CLR</name>
-+        <description>Atomic CLR alias view of PLL_SYS (+0x3000)</description>
-+        <baseAddress>0x40053000</baseAddress>
-+    </peripheral>
-     <peripheral derivedFrom="PLL_SYS">
-         <name>PLL_USB</name>
-         <baseAddress>0x40058000</baseAddress>
-@@ -43612,6 +43882,21 @@ SPDX-License-Identifier: BSD-3-Clause
-         <value>43</value>
-     </interrupt>
-     </peripheral>
-+    <peripheral derivedFrom="PLL_USB">
-+        <name>PLL_USB_XOR</name>
-+        <description>Atomic XOR alias view of PLL_USB (+0x1000)</description>
-+        <baseAddress>0x40059000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PLL_USB">
-+        <name>PLL_USB_SET</name>
-+        <description>Atomic SET alias view of PLL_USB (+0x2000)</description>
-+        <baseAddress>0x4005A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PLL_USB">
-+        <name>PLL_USB_CLR</name>
-+        <description>Atomic CLR alias view of PLL_USB (+0x3000)</description>
-+        <baseAddress>0x4005B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>ACCESSCTRL</name>
-         <description>Hardware access control registers</description>
-@@ -47091,6 +47376,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="ACCESSCTRL">
-+        <name>ACCESSCTRL_XOR</name>
-+        <description>Atomic XOR alias view of ACCESSCTRL (+0x1000)</description>
-+        <baseAddress>0x40061000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="ACCESSCTRL">
-+        <name>ACCESSCTRL_SET</name>
-+        <description>Atomic SET alias view of ACCESSCTRL (+0x2000)</description>
-+        <baseAddress>0x40062000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="ACCESSCTRL">
-+        <name>ACCESSCTRL_CLR</name>
-+        <description>Atomic CLR alias view of ACCESSCTRL (+0x3000)</description>
-+        <baseAddress>0x40063000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>UART0</name>
-         <baseAddress>0x40070000</baseAddress>
-@@ -47892,6 +48192,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="UART0">
-+        <name>UART0_XOR</name>
-+        <description>Atomic XOR alias view of UART0 (+0x1000)</description>
-+        <baseAddress>0x40071000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="UART0">
-+        <name>UART0_SET</name>
-+        <description>Atomic SET alias view of UART0 (+0x2000)</description>
-+        <baseAddress>0x40072000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="UART0">
-+        <name>UART0_CLR</name>
-+        <description>Atomic CLR alias view of UART0 (+0x3000)</description>
-+        <baseAddress>0x40073000</baseAddress>
-+    </peripheral>
-     <peripheral derivedFrom="UART0">
-         <name>UART1</name>
-         <baseAddress>0x40078000</baseAddress>
-@@ -47900,6 +48215,21 @@ SPDX-License-Identifier: BSD-3-Clause
-         <value>34</value>
-     </interrupt>
-     </peripheral>
-+    <peripheral derivedFrom="UART1">
-+        <name>UART1_XOR</name>
-+        <description>Atomic XOR alias view of UART1 (+0x1000)</description>
-+        <baseAddress>0x40079000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="UART1">
-+        <name>UART1_SET</name>
-+        <description>Atomic SET alias view of UART1 (+0x2000)</description>
-+        <baseAddress>0x4007A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="UART1">
-+        <name>UART1_CLR</name>
-+        <description>Atomic CLR alias view of UART1 (+0x3000)</description>
-+        <baseAddress>0x4007B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>ROSC</name>
-         <baseAddress>0x400e8000</baseAddress>
-@@ -48241,6 +48571,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="ROSC">
-+        <name>ROSC_XOR</name>
-+        <description>Atomic XOR alias view of ROSC (+0x1000)</description>
-+        <baseAddress>0x400E9000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="ROSC">
-+        <name>ROSC_SET</name>
-+        <description>Atomic SET alias view of ROSC (+0x2000)</description>
-+        <baseAddress>0x400EA000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="ROSC">
-+        <name>ROSC_CLR</name>
-+        <description>Atomic CLR alias view of ROSC (+0x3000)</description>
-+        <baseAddress>0x400EB000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>POWMAN</name>
-         <description>Controls vreg, bor, lposc, chip resets &amp; xosc startup, powman and provides scratch register for general use and for bootcode use</description>
-@@ -50224,6 +50569,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="POWMAN">
-+        <name>POWMAN_XOR</name>
-+        <description>Atomic XOR alias view of POWMAN (+0x1000)</description>
-+        <baseAddress>0x40101000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="POWMAN">
-+        <name>POWMAN_SET</name>
-+        <description>Atomic SET alias view of POWMAN (+0x2000)</description>
-+        <baseAddress>0x40102000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="POWMAN">
-+        <name>POWMAN_CLR</name>
-+        <description>Atomic CLR alias view of POWMAN (+0x3000)</description>
-+        <baseAddress>0x40103000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>WATCHDOG</name>
-         <baseAddress>0x400d8000</baseAddress>
-@@ -50418,6 +50778,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="WATCHDOG">
-+        <name>WATCHDOG_XOR</name>
-+        <description>Atomic XOR alias view of WATCHDOG (+0x1000)</description>
-+        <baseAddress>0x400D9000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="WATCHDOG">
-+        <name>WATCHDOG_SET</name>
-+        <description>Atomic SET alias view of WATCHDOG (+0x2000)</description>
-+        <baseAddress>0x400DA000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="WATCHDOG">
-+        <name>WATCHDOG_CLR</name>
-+        <description>Atomic CLR alias view of WATCHDOG (+0x3000)</description>
-+        <baseAddress>0x400DB000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>DMA</name>
-         <description>DMA with separate read and write masters</description>
-@@ -63905,6 +64280,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="DMA">
-+        <name>DMA_XOR</name>
-+        <description>Atomic XOR alias view of DMA (+0x1000)</description>
-+        <baseAddress>0x50001000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="DMA">
-+        <name>DMA_SET</name>
-+        <description>Atomic SET alias view of DMA (+0x2000)</description>
-+        <baseAddress>0x50002000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="DMA">
-+        <name>DMA_CLR</name>
-+        <description>Atomic CLR alias view of DMA (+0x3000)</description>
-+        <baseAddress>0x50003000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>TIMER0</name>
-         <description>Controls time and alarms
-@@ -64269,6 +64659,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="TIMER0">
-+        <name>TIMER0_XOR</name>
-+        <description>Atomic XOR alias view of TIMER0 (+0x1000)</description>
-+        <baseAddress>0x400B1000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TIMER0">
-+        <name>TIMER0_SET</name>
-+        <description>Atomic SET alias view of TIMER0 (+0x2000)</description>
-+        <baseAddress>0x400B2000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TIMER0">
-+        <name>TIMER0_CLR</name>
-+        <description>Atomic CLR alias view of TIMER0 (+0x3000)</description>
-+        <baseAddress>0x400B3000</baseAddress>
-+    </peripheral>
-     <peripheral derivedFrom="TIMER0">
-         <name>TIMER1</name>
-         <baseAddress>0x400b8000</baseAddress>
-@@ -64289,6 +64694,21 @@ SPDX-License-Identifier: BSD-3-Clause
-         <value>7</value>
-     </interrupt>
-     </peripheral>
-+    <peripheral derivedFrom="TIMER1">
-+        <name>TIMER1_XOR</name>
-+        <description>Atomic XOR alias view of TIMER1 (+0x1000)</description>
-+        <baseAddress>0x400B9000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TIMER1">
-+        <name>TIMER1_SET</name>
-+        <description>Atomic SET alias view of TIMER1 (+0x2000)</description>
-+        <baseAddress>0x400BA000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TIMER1">
-+        <name>TIMER1_CLR</name>
-+        <description>Atomic CLR alias view of TIMER1 (+0x3000)</description>
-+        <baseAddress>0x400BB000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>PWM</name>
-         <description>Simple PWM</description>
-@@ -66525,6 +66945,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="PWM">
-+        <name>PWM_XOR</name>
-+        <description>Atomic XOR alias view of PWM (+0x1000)</description>
-+        <baseAddress>0x400A9000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PWM">
-+        <name>PWM_SET</name>
-+        <description>Atomic SET alias view of PWM (+0x2000)</description>
-+        <baseAddress>0x400AA000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PWM">
-+        <name>PWM_CLR</name>
-+        <description>Atomic CLR alias view of PWM (+0x3000)</description>
-+        <baseAddress>0x400AB000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>ADC</name>
-         <description>Control and data interface to SAR ADC</description>
-@@ -66795,6 +67230,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="ADC">
-+        <name>ADC_XOR</name>
-+        <description>Atomic XOR alias view of ADC (+0x1000)</description>
-+        <baseAddress>0x400A1000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="ADC">
-+        <name>ADC_SET</name>
-+        <description>Atomic SET alias view of ADC (+0x2000)</description>
-+        <baseAddress>0x400A2000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="ADC">
-+        <name>ADC_CLR</name>
-+        <description>Atomic CLR alias view of ADC (+0x3000)</description>
-+        <baseAddress>0x400A3000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>I2C0</name>
-         <description>DW_apb_i2c address block
-@@ -69426,6 +69876,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="I2C0">
-+        <name>I2C0_XOR</name>
-+        <description>Atomic XOR alias view of I2C0 (+0x1000)</description>
-+        <baseAddress>0x40091000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="I2C0">
-+        <name>I2C0_SET</name>
-+        <description>Atomic SET alias view of I2C0 (+0x2000)</description>
-+        <baseAddress>0x40092000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="I2C0">
-+        <name>I2C0_CLR</name>
-+        <description>Atomic CLR alias view of I2C0 (+0x3000)</description>
-+        <baseAddress>0x40093000</baseAddress>
-+    </peripheral>
-     <peripheral derivedFrom="I2C0">
-         <name>I2C1</name>
-         <baseAddress>0x40098000</baseAddress>
-@@ -69434,6 +69899,21 @@ SPDX-License-Identifier: BSD-3-Clause
-         <value>37</value>
-     </interrupt>
-     </peripheral>
-+    <peripheral derivedFrom="I2C1">
-+        <name>I2C1_XOR</name>
-+        <description>Atomic XOR alias view of I2C1 (+0x1000)</description>
-+        <baseAddress>0x40099000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="I2C1">
-+        <name>I2C1_SET</name>
-+        <description>Atomic SET alias view of I2C1 (+0x2000)</description>
-+        <baseAddress>0x4009A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="I2C1">
-+        <name>I2C1_CLR</name>
-+        <description>Atomic CLR alias view of I2C1 (+0x3000)</description>
-+        <baseAddress>0x4009B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>SPI0</name>
-         <baseAddress>0x40080000</baseAddress>
-@@ -69848,6 +70328,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="SPI0">
-+        <name>SPI0_XOR</name>
-+        <description>Atomic XOR alias view of SPI0 (+0x1000)</description>
-+        <baseAddress>0x40081000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SPI0">
-+        <name>SPI0_SET</name>
-+        <description>Atomic SET alias view of SPI0 (+0x2000)</description>
-+        <baseAddress>0x40082000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SPI0">
-+        <name>SPI0_CLR</name>
-+        <description>Atomic CLR alias view of SPI0 (+0x3000)</description>
-+        <baseAddress>0x40083000</baseAddress>
-+    </peripheral>
-     <peripheral derivedFrom="SPI0">
-         <name>SPI1</name>
-         <baseAddress>0x40088000</baseAddress>
-@@ -69856,6 +70351,21 @@ SPDX-License-Identifier: BSD-3-Clause
-         <value>32</value>
-     </interrupt>
-     </peripheral>
-+    <peripheral derivedFrom="SPI1">
-+        <name>SPI1_XOR</name>
-+        <description>Atomic XOR alias view of SPI1 (+0x1000)</description>
-+        <baseAddress>0x40089000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SPI1">
-+        <name>SPI1_SET</name>
-+        <description>Atomic SET alias view of SPI1 (+0x2000)</description>
-+        <baseAddress>0x4008A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="SPI1">
-+        <name>SPI1_CLR</name>
-+        <description>Atomic CLR alias view of SPI1 (+0x3000)</description>
-+        <baseAddress>0x4008B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>PIO0</name>
-         <description>Programmable IO block</description>
-@@ -72775,6 +73285,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="PIO0">
-+        <name>PIO0_XOR</name>
-+        <description>Atomic XOR alias view of PIO0 (+0x1000)</description>
-+        <baseAddress>0x50201000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PIO0">
-+        <name>PIO0_SET</name>
-+        <description>Atomic SET alias view of PIO0 (+0x2000)</description>
-+        <baseAddress>0x50202000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PIO0">
-+        <name>PIO0_CLR</name>
-+        <description>Atomic CLR alias view of PIO0 (+0x3000)</description>
-+        <baseAddress>0x50203000</baseAddress>
-+    </peripheral>
-     <peripheral derivedFrom="PIO0">
-         <name>PIO1</name>
-         <baseAddress>0x50300000</baseAddress>
-@@ -72787,6 +73312,21 @@ SPDX-License-Identifier: BSD-3-Clause
-         <value>18</value>
-     </interrupt>
-     </peripheral>
-+    <peripheral derivedFrom="PIO1">
-+        <name>PIO1_XOR</name>
-+        <description>Atomic XOR alias view of PIO1 (+0x1000)</description>
-+        <baseAddress>0x50301000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PIO1">
-+        <name>PIO1_SET</name>
-+        <description>Atomic SET alias view of PIO1 (+0x2000)</description>
-+        <baseAddress>0x50302000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PIO1">
-+        <name>PIO1_CLR</name>
-+        <description>Atomic CLR alias view of PIO1 (+0x3000)</description>
-+        <baseAddress>0x50303000</baseAddress>
-+    </peripheral>
-     <peripheral derivedFrom="PIO0">
-         <name>PIO2</name>
-         <baseAddress>0x50400000</baseAddress>
-@@ -72799,6 +73339,21 @@ SPDX-License-Identifier: BSD-3-Clause
-         <value>20</value>
-     </interrupt>
-     </peripheral>
-+    <peripheral derivedFrom="PIO2">
-+        <name>PIO2_XOR</name>
-+        <description>Atomic XOR alias view of PIO2 (+0x1000)</description>
-+        <baseAddress>0x50401000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PIO2">
-+        <name>PIO2_SET</name>
-+        <description>Atomic SET alias view of PIO2 (+0x2000)</description>
-+        <baseAddress>0x50402000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="PIO2">
-+        <name>PIO2_CLR</name>
-+        <description>Atomic CLR alias view of PIO2 (+0x3000)</description>
-+        <baseAddress>0x50403000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>BUSCTRL</name>
-         <description>Register block for busfabric control signals and performance counters</description>
-@@ -74094,6 +74649,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="BUSCTRL">
-+        <name>BUSCTRL_XOR</name>
-+        <description>Atomic XOR alias view of BUSCTRL (+0x1000)</description>
-+        <baseAddress>0x40069000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="BUSCTRL">
-+        <name>BUSCTRL_SET</name>
-+        <description>Atomic SET alias view of BUSCTRL (+0x2000)</description>
-+        <baseAddress>0x4006A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="BUSCTRL">
-+        <name>BUSCTRL_CLR</name>
-+        <description>Atomic CLR alias view of BUSCTRL (+0x3000)</description>
-+        <baseAddress>0x4006B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>SIO</name>
-         <description>Single-cycle IO block 
-@@ -80055,6 +80625,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="USB">
-+        <name>USB_XOR</name>
-+        <description>Atomic XOR alias view of USB (+0x1000)</description>
-+        <baseAddress>0x50111000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="USB">
-+        <name>USB_SET</name>
-+        <description>Atomic SET alias view of USB (+0x2000)</description>
-+        <baseAddress>0x50112000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="USB">
-+        <name>USB_CLR</name>
-+        <description>Atomic CLR alias view of USB (+0x3000)</description>
-+        <baseAddress>0x50113000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>TRNG</name>
-         <description>ARM TrustZone RNG register block</description>
-@@ -80603,6 +81188,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="TRNG">
-+        <name>TRNG_XOR</name>
-+        <description>Atomic XOR alias view of TRNG (+0x1000)</description>
-+        <baseAddress>0x400F1000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TRNG">
-+        <name>TRNG_SET</name>
-+        <description>Atomic SET alias view of TRNG (+0x2000)</description>
-+        <baseAddress>0x400F2000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TRNG">
-+        <name>TRNG_CLR</name>
-+        <description>Atomic CLR alias view of TRNG (+0x3000)</description>
-+        <baseAddress>0x400F3000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>GLITCH_DETECTOR</name>
-         <description>Glitch detector controls</description>
-@@ -80812,6 +81412,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="GLITCH_DETECTOR">
-+        <name>GLITCH_DETECTOR_XOR</name>
-+        <description>Atomic XOR alias view of GLITCH_DETECTOR (+0x1000)</description>
-+        <baseAddress>0x40159000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="GLITCH_DETECTOR">
-+        <name>GLITCH_DETECTOR_SET</name>
-+        <description>Atomic SET alias view of GLITCH_DETECTOR (+0x2000)</description>
-+        <baseAddress>0x4015A000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="GLITCH_DETECTOR">
-+        <name>GLITCH_DETECTOR_CLR</name>
-+        <description>Atomic CLR alias view of GLITCH_DETECTOR (+0x3000)</description>
-+        <baseAddress>0x4015B000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>OTP</name>
-         <description>SNPS OTP control IF (SBPI and RPi wrapper control)</description>
-@@ -100247,6 +100862,21 @@ SPDX-License-Identifier: BSD-3-Clause
-             </register>
-         </registers>
-     </peripheral>
-+    <peripheral derivedFrom="TBMAN">
-+        <name>TBMAN_XOR</name>
-+        <description>Atomic XOR alias view of TBMAN (+0x1000)</description>
-+        <baseAddress>0x40161000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TBMAN">
-+        <name>TBMAN_SET</name>
-+        <description>Atomic SET alias view of TBMAN (+0x2000)</description>
-+        <baseAddress>0x40162000</baseAddress>
-+    </peripheral>
-+    <peripheral derivedFrom="TBMAN">
-+        <name>TBMAN_CLR</name>
-+        <description>Atomic CLR alias view of TBMAN (+0x3000)</description>
-+        <baseAddress>0x40163000</baseAddress>
-+    </peripheral>
-     <peripheral>
-         <name>USB_DPRAM</name>
-         <description>DPRAM layout for USB device.</description>
diff --git a/src/rp2350/hardware_regs/RP2350.svd b/src/rp2350/hardware_regs/RP2350.svd
index dc2e1f2..854ee95 100644
--- a/src/rp2350/hardware_regs/RP2350.svd
+++ b/src/rp2350/hardware_regs/RP2350.svd
@@ -528,6 +528,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="RESETS">
+        <name>RESETS_XOR</name>
+        <description>Atomic XOR alias view of RESETS (+0x1000)</description>
+        <baseAddress>0x40021000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="RESETS">
+        <name>RESETS_SET</name>
+        <description>Atomic SET alias view of RESETS (+0x2000)</description>
+        <baseAddress>0x40022000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="RESETS">
+        <name>RESETS_CLR</name>
+        <description>Atomic CLR alias view of RESETS (+0x3000)</description>
+        <baseAddress>0x40023000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>PSM</name>
         <baseAddress>0x40018000</baseAddress>
@@ -1071,6 +1086,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="PSM">
+        <name>PSM_XOR</name>
+        <description>Atomic XOR alias view of PSM (+0x1000)</description>
+        <baseAddress>0x40019000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PSM">
+        <name>PSM_SET</name>
+        <description>Atomic SET alias view of PSM (+0x2000)</description>
+        <baseAddress>0x4001A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PSM">
+        <name>PSM_CLR</name>
+        <description>Atomic CLR alias view of PSM (+0x3000)</description>
+        <baseAddress>0x4001B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>CLOCKS</name>
         <baseAddress>0x40010000</baseAddress>
@@ -3621,6 +3651,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="CLOCKS">
+        <name>CLOCKS_XOR</name>
+        <description>Atomic XOR alias view of CLOCKS (+0x1000)</description>
+        <baseAddress>0x40011000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="CLOCKS">
+        <name>CLOCKS_SET</name>
+        <description>Atomic SET alias view of CLOCKS (+0x2000)</description>
+        <baseAddress>0x40012000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="CLOCKS">
+        <name>CLOCKS_CLR</name>
+        <description>Atomic CLR alias view of CLOCKS (+0x3000)</description>
+        <baseAddress>0x40013000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>TICKS</name>
         <baseAddress>0x40108000</baseAddress>
@@ -3908,6 +3953,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="TICKS">
+        <name>TICKS_XOR</name>
+        <description>Atomic XOR alias view of TICKS (+0x1000)</description>
+        <baseAddress>0x40109000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TICKS">
+        <name>TICKS_SET</name>
+        <description>Atomic SET alias view of TICKS (+0x2000)</description>
+        <baseAddress>0x4010A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TICKS">
+        <name>TICKS_CLR</name>
+        <description>Atomic CLR alias view of TICKS (+0x3000)</description>
+        <baseAddress>0x4010B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>PADS_BANK0</name>
         <baseAddress>0x40038000</baseAddress>
@@ -7594,6 +7654,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="PADS_BANK0">
+        <name>PADS_BANK0_XOR</name>
+        <description>Atomic XOR alias view of PADS_BANK0 (+0x1000)</description>
+        <baseAddress>0x40039000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PADS_BANK0">
+        <name>PADS_BANK0_SET</name>
+        <description>Atomic SET alias view of PADS_BANK0 (+0x2000)</description>
+        <baseAddress>0x4003A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PADS_BANK0">
+        <name>PADS_BANK0_CLR</name>
+        <description>Atomic CLR alias view of PADS_BANK0 (+0x3000)</description>
+        <baseAddress>0x4003B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>PADS_QSPI</name>
         <baseAddress>0x40040000</baseAddress>
@@ -8068,6 +8143,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="PADS_QSPI">
+        <name>PADS_QSPI_XOR</name>
+        <description>Atomic XOR alias view of PADS_QSPI (+0x1000)</description>
+        <baseAddress>0x40041000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PADS_QSPI">
+        <name>PADS_QSPI_SET</name>
+        <description>Atomic SET alias view of PADS_QSPI (+0x2000)</description>
+        <baseAddress>0x40042000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PADS_QSPI">
+        <name>PADS_QSPI_CLR</name>
+        <description>Atomic CLR alias view of PADS_QSPI (+0x3000)</description>
+        <baseAddress>0x40043000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>IO_QSPI</name>
         <baseAddress>0x40030000</baseAddress>
@@ -11473,6 +11563,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="IO_QSPI">
+        <name>IO_QSPI_XOR</name>
+        <description>Atomic XOR alias view of IO_QSPI (+0x1000)</description>
+        <baseAddress>0x40031000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="IO_QSPI">
+        <name>IO_QSPI_SET</name>
+        <description>Atomic SET alias view of IO_QSPI (+0x2000)</description>
+        <baseAddress>0x40032000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="IO_QSPI">
+        <name>IO_QSPI_CLR</name>
+        <description>Atomic CLR alias view of IO_QSPI (+0x3000)</description>
+        <baseAddress>0x40033000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>IO_BANK0</name>
         <baseAddress>0x40028000</baseAddress>
@@ -32772,6 +32877,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="IO_BANK0">
+        <name>IO_BANK0_XOR</name>
+        <description>Atomic XOR alias view of IO_BANK0 (+0x1000)</description>
+        <baseAddress>0x40029000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="IO_BANK0">
+        <name>IO_BANK0_SET</name>
+        <description>Atomic SET alias view of IO_BANK0 (+0x2000)</description>
+        <baseAddress>0x4002A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="IO_BANK0">
+        <name>IO_BANK0_CLR</name>
+        <description>Atomic CLR alias view of IO_BANK0 (+0x3000)</description>
+        <baseAddress>0x4002B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>SYSINFO</name>
         <baseAddress>0x40000000</baseAddress>
@@ -32869,6 +32989,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="SYSINFO">
+        <name>SYSINFO_XOR</name>
+        <description>Atomic XOR alias view of SYSINFO (+0x1000)</description>
+        <baseAddress>0x40001000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SYSINFO">
+        <name>SYSINFO_SET</name>
+        <description>Atomic SET alias view of SYSINFO (+0x2000)</description>
+        <baseAddress>0x40002000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SYSINFO">
+        <name>SYSINFO_CLR</name>
+        <description>Atomic CLR alias view of SYSINFO (+0x3000)</description>
+        <baseAddress>0x40003000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>SHA256</name>
         <description>SHA-256 hash function implementation</description>
@@ -33080,6 +33215,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="SHA256">
+        <name>SHA256_XOR</name>
+        <description>Atomic XOR alias view of SHA256 (+0x1000)</description>
+        <baseAddress>0x400F9000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SHA256">
+        <name>SHA256_SET</name>
+        <description>Atomic SET alias view of SHA256 (+0x2000)</description>
+        <baseAddress>0x400FA000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SHA256">
+        <name>SHA256_CLR</name>
+        <description>Atomic CLR alias view of SHA256 (+0x3000)</description>
+        <baseAddress>0x400FB000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>HSTX_FIFO</name>
         <description>FIFO status and write access for HSTX</description>
@@ -33135,6 +33285,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="HSTX_FIFO">
+        <name>HSTX_FIFO_XOR</name>
+        <description>Atomic XOR alias view of HSTX_FIFO (+0x1000)</description>
+        <baseAddress>0x50601000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="HSTX_FIFO">
+        <name>HSTX_FIFO_SET</name>
+        <description>Atomic SET alias view of HSTX_FIFO (+0x2000)</description>
+        <baseAddress>0x50602000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="HSTX_FIFO">
+        <name>HSTX_FIFO_CLR</name>
+        <description>Atomic CLR alias view of HSTX_FIFO (+0x3000)</description>
+        <baseAddress>0x50603000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>HSTX_CTRL</name>
         <description>Control interface to HSTX. For FIFO write access and status, see the HSTX_FIFO register block.</description>
@@ -33568,6 +33733,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="HSTX_CTRL">
+        <name>HSTX_CTRL_XOR</name>
+        <description>Atomic XOR alias view of HSTX_CTRL (+0x1000)</description>
+        <baseAddress>0x400C1000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="HSTX_CTRL">
+        <name>HSTX_CTRL_SET</name>
+        <description>Atomic SET alias view of HSTX_CTRL (+0x2000)</description>
+        <baseAddress>0x400C2000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="HSTX_CTRL">
+        <name>HSTX_CTRL_CLR</name>
+        <description>Atomic CLR alias view of HSTX_CTRL (+0x3000)</description>
+        <baseAddress>0x400C3000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>EPPB</name>
         <description>Cortex-M33 EPPB vendor register block for RP2350</description>
@@ -42695,6 +42875,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="QMI">
+        <name>QMI_XOR</name>
+        <description>Atomic XOR alias view of QMI (+0x1000)</description>
+        <baseAddress>0x400D1000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="QMI">
+        <name>QMI_SET</name>
+        <description>Atomic SET alias view of QMI (+0x2000)</description>
+        <baseAddress>0x400D2000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="QMI">
+        <name>QMI_CLR</name>
+        <description>Atomic CLR alias view of QMI (+0x3000)</description>
+        <baseAddress>0x400D3000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>XIP_CTRL</name>
         <description>QSPI flash execute-in-place block</description>
@@ -42924,6 +43119,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="XIP_CTRL">
+        <name>XIP_CTRL_XOR</name>
+        <description>Atomic XOR alias view of XIP_CTRL (+0x1000)</description>
+        <baseAddress>0x400C9000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="XIP_CTRL">
+        <name>XIP_CTRL_SET</name>
+        <description>Atomic SET alias view of XIP_CTRL (+0x2000)</description>
+        <baseAddress>0x400CA000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="XIP_CTRL">
+        <name>XIP_CTRL_CLR</name>
+        <description>Atomic CLR alias view of XIP_CTRL (+0x3000)</description>
+        <baseAddress>0x400CB000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>XIP_AUX</name>
         <description>Auxiliary DMA access to XIP FIFOs, via fast AHB bus access</description>
@@ -43028,6 +43238,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="XIP_AUX">
+        <name>XIP_AUX_XOR</name>
+        <description>Atomic XOR alias view of XIP_AUX (+0x1000)</description>
+        <baseAddress>0x50501000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="XIP_AUX">
+        <name>XIP_AUX_SET</name>
+        <description>Atomic SET alias view of XIP_AUX (+0x2000)</description>
+        <baseAddress>0x50502000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="XIP_AUX">
+        <name>XIP_AUX_CLR</name>
+        <description>Atomic CLR alias view of XIP_AUX (+0x3000)</description>
+        <baseAddress>0x50503000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>SYSCFG</name>
         <description>Register block for various chip control signals</description>
@@ -43245,6 +43470,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="SYSCFG">
+        <name>SYSCFG_XOR</name>
+        <description>Atomic XOR alias view of SYSCFG (+0x1000)</description>
+        <baseAddress>0x40009000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SYSCFG">
+        <name>SYSCFG_SET</name>
+        <description>Atomic SET alias view of SYSCFG (+0x2000)</description>
+        <baseAddress>0x4000A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SYSCFG">
+        <name>SYSCFG_CLR</name>
+        <description>Atomic CLR alias view of SYSCFG (+0x3000)</description>
+        <baseAddress>0x4000B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>XOSC</name>
         <description>Controls the crystal oscillator</description>
@@ -43423,6 +43663,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="XOSC">
+        <name>XOSC_XOR</name>
+        <description>Atomic XOR alias view of XOSC (+0x1000)</description>
+        <baseAddress>0x40049000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="XOSC">
+        <name>XOSC_SET</name>
+        <description>Atomic SET alias view of XOSC (+0x2000)</description>
+        <baseAddress>0x4004A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="XOSC">
+        <name>XOSC_CLR</name>
+        <description>Atomic CLR alias view of XOSC (+0x3000)</description>
+        <baseAddress>0x4004B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>PLL_SYS</name>
         <baseAddress>0x40050000</baseAddress>
@@ -43604,6 +43859,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="PLL_SYS">
+        <name>PLL_SYS_XOR</name>
+        <description>Atomic XOR alias view of PLL_SYS (+0x1000)</description>
+        <baseAddress>0x40051000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PLL_SYS">
+        <name>PLL_SYS_SET</name>
+        <description>Atomic SET alias view of PLL_SYS (+0x2000)</description>
+        <baseAddress>0x40052000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PLL_SYS">
+        <name>PLL_SYS_CLR</name>
+        <description>Atomic CLR alias view of PLL_SYS (+0x3000)</description>
+        <baseAddress>0x40053000</baseAddress>
+    </peripheral>
     <peripheral derivedFrom="PLL_SYS">
         <name>PLL_USB</name>
         <baseAddress>0x40058000</baseAddress>
@@ -43612,6 +43882,21 @@ SPDX-License-Identifier: BSD-3-Clause
         <value>43</value>
     </interrupt>
     </peripheral>
+    <peripheral derivedFrom="PLL_USB">
+        <name>PLL_USB_XOR</name>
+        <description>Atomic XOR alias view of PLL_USB (+0x1000)</description>
+        <baseAddress>0x40059000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PLL_USB">
+        <name>PLL_USB_SET</name>
+        <description>Atomic SET alias view of PLL_USB (+0x2000)</description>
+        <baseAddress>0x4005A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PLL_USB">
+        <name>PLL_USB_CLR</name>
+        <description>Atomic CLR alias view of PLL_USB (+0x3000)</description>
+        <baseAddress>0x4005B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>ACCESSCTRL</name>
         <description>Hardware access control registers</description>
@@ -47091,6 +47376,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="ACCESSCTRL">
+        <name>ACCESSCTRL_XOR</name>
+        <description>Atomic XOR alias view of ACCESSCTRL (+0x1000)</description>
+        <baseAddress>0x40061000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="ACCESSCTRL">
+        <name>ACCESSCTRL_SET</name>
+        <description>Atomic SET alias view of ACCESSCTRL (+0x2000)</description>
+        <baseAddress>0x40062000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="ACCESSCTRL">
+        <name>ACCESSCTRL_CLR</name>
+        <description>Atomic CLR alias view of ACCESSCTRL (+0x3000)</description>
+        <baseAddress>0x40063000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>UART0</name>
         <baseAddress>0x40070000</baseAddress>
@@ -47892,6 +48192,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="UART0">
+        <name>UART0_XOR</name>
+        <description>Atomic XOR alias view of UART0 (+0x1000)</description>
+        <baseAddress>0x40071000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="UART0">
+        <name>UART0_SET</name>
+        <description>Atomic SET alias view of UART0 (+0x2000)</description>
+        <baseAddress>0x40072000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="UART0">
+        <name>UART0_CLR</name>
+        <description>Atomic CLR alias view of UART0 (+0x3000)</description>
+        <baseAddress>0x40073000</baseAddress>
+    </peripheral>
     <peripheral derivedFrom="UART0">
         <name>UART1</name>
         <baseAddress>0x40078000</baseAddress>
@@ -47900,6 +48215,21 @@ SPDX-License-Identifier: BSD-3-Clause
         <value>34</value>
     </interrupt>
     </peripheral>
+    <peripheral derivedFrom="UART1">
+        <name>UART1_XOR</name>
+        <description>Atomic XOR alias view of UART1 (+0x1000)</description>
+        <baseAddress>0x40079000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="UART1">
+        <name>UART1_SET</name>
+        <description>Atomic SET alias view of UART1 (+0x2000)</description>
+        <baseAddress>0x4007A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="UART1">
+        <name>UART1_CLR</name>
+        <description>Atomic CLR alias view of UART1 (+0x3000)</description>
+        <baseAddress>0x4007B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>ROSC</name>
         <baseAddress>0x400e8000</baseAddress>
@@ -48241,6 +48571,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="ROSC">
+        <name>ROSC_XOR</name>
+        <description>Atomic XOR alias view of ROSC (+0x1000)</description>
+        <baseAddress>0x400E9000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="ROSC">
+        <name>ROSC_SET</name>
+        <description>Atomic SET alias view of ROSC (+0x2000)</description>
+        <baseAddress>0x400EA000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="ROSC">
+        <name>ROSC_CLR</name>
+        <description>Atomic CLR alias view of ROSC (+0x3000)</description>
+        <baseAddress>0x400EB000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>POWMAN</name>
         <description>Controls vreg, bor, lposc, chip resets &amp; xosc startup, powman and provides scratch register for general use and for bootcode use</description>
@@ -50224,6 +50569,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="POWMAN">
+        <name>POWMAN_XOR</name>
+        <description>Atomic XOR alias view of POWMAN (+0x1000)</description>
+        <baseAddress>0x40101000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="POWMAN">
+        <name>POWMAN_SET</name>
+        <description>Atomic SET alias view of POWMAN (+0x2000)</description>
+        <baseAddress>0x40102000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="POWMAN">
+        <name>POWMAN_CLR</name>
+        <description>Atomic CLR alias view of POWMAN (+0x3000)</description>
+        <baseAddress>0x40103000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>WATCHDOG</name>
         <baseAddress>0x400d8000</baseAddress>
@@ -50418,6 +50778,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="WATCHDOG">
+        <name>WATCHDOG_XOR</name>
+        <description>Atomic XOR alias view of WATCHDOG (+0x1000)</description>
+        <baseAddress>0x400D9000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="WATCHDOG">
+        <name>WATCHDOG_SET</name>
+        <description>Atomic SET alias view of WATCHDOG (+0x2000)</description>
+        <baseAddress>0x400DA000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="WATCHDOG">
+        <name>WATCHDOG_CLR</name>
+        <description>Atomic CLR alias view of WATCHDOG (+0x3000)</description>
+        <baseAddress>0x400DB000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>DMA</name>
         <description>DMA with separate read and write masters</description>
@@ -63905,6 +64280,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="DMA">
+        <name>DMA_XOR</name>
+        <description>Atomic XOR alias view of DMA (+0x1000)</description>
+        <baseAddress>0x50001000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="DMA">
+        <name>DMA_SET</name>
+        <description>Atomic SET alias view of DMA (+0x2000)</description>
+        <baseAddress>0x50002000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="DMA">
+        <name>DMA_CLR</name>
+        <description>Atomic CLR alias view of DMA (+0x3000)</description>
+        <baseAddress>0x50003000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>TIMER0</name>
         <description>Controls time and alarms
@@ -64269,6 +64659,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="TIMER0">
+        <name>TIMER0_XOR</name>
+        <description>Atomic XOR alias view of TIMER0 (+0x1000)</description>
+        <baseAddress>0x400B1000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TIMER0">
+        <name>TIMER0_SET</name>
+        <description>Atomic SET alias view of TIMER0 (+0x2000)</description>
+        <baseAddress>0x400B2000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TIMER0">
+        <name>TIMER0_CLR</name>
+        <description>Atomic CLR alias view of TIMER0 (+0x3000)</description>
+        <baseAddress>0x400B3000</baseAddress>
+    </peripheral>
     <peripheral derivedFrom="TIMER0">
         <name>TIMER1</name>
         <baseAddress>0x400b8000</baseAddress>
@@ -64289,6 +64694,21 @@ SPDX-License-Identifier: BSD-3-Clause
         <value>7</value>
     </interrupt>
     </peripheral>
+    <peripheral derivedFrom="TIMER1">
+        <name>TIMER1_XOR</name>
+        <description>Atomic XOR alias view of TIMER1 (+0x1000)</description>
+        <baseAddress>0x400B9000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TIMER1">
+        <name>TIMER1_SET</name>
+        <description>Atomic SET alias view of TIMER1 (+0x2000)</description>
+        <baseAddress>0x400BA000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TIMER1">
+        <name>TIMER1_CLR</name>
+        <description>Atomic CLR alias view of TIMER1 (+0x3000)</description>
+        <baseAddress>0x400BB000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>PWM</name>
         <description>Simple PWM</description>
@@ -66525,6 +66945,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="PWM">
+        <name>PWM_XOR</name>
+        <description>Atomic XOR alias view of PWM (+0x1000)</description>
+        <baseAddress>0x400A9000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PWM">
+        <name>PWM_SET</name>
+        <description>Atomic SET alias view of PWM (+0x2000)</description>
+        <baseAddress>0x400AA000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PWM">
+        <name>PWM_CLR</name>
+        <description>Atomic CLR alias view of PWM (+0x3000)</description>
+        <baseAddress>0x400AB000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>ADC</name>
         <description>Control and data interface to SAR ADC</description>
@@ -66795,6 +67230,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="ADC">
+        <name>ADC_XOR</name>
+        <description>Atomic XOR alias view of ADC (+0x1000)</description>
+        <baseAddress>0x400A1000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="ADC">
+        <name>ADC_SET</name>
+        <description>Atomic SET alias view of ADC (+0x2000)</description>
+        <baseAddress>0x400A2000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="ADC">
+        <name>ADC_CLR</name>
+        <description>Atomic CLR alias view of ADC (+0x3000)</description>
+        <baseAddress>0x400A3000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>I2C0</name>
         <description>DW_apb_i2c address block
@@ -69426,6 +69876,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="I2C0">
+        <name>I2C0_XOR</name>
+        <description>Atomic XOR alias view of I2C0 (+0x1000)</description>
+        <baseAddress>0x40091000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="I2C0">
+        <name>I2C0_SET</name>
+        <description>Atomic SET alias view of I2C0 (+0x2000)</description>
+        <baseAddress>0x40092000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="I2C0">
+        <name>I2C0_CLR</name>
+        <description>Atomic CLR alias view of I2C0 (+0x3000)</description>
+        <baseAddress>0x40093000</baseAddress>
+    </peripheral>
     <peripheral derivedFrom="I2C0">
         <name>I2C1</name>
         <baseAddress>0x40098000</baseAddress>
@@ -69434,6 +69899,21 @@ SPDX-License-Identifier: BSD-3-Clause
         <value>37</value>
     </interrupt>
     </peripheral>
+    <peripheral derivedFrom="I2C1">
+        <name>I2C1_XOR</name>
+        <description>Atomic XOR alias view of I2C1 (+0x1000)</description>
+        <baseAddress>0x40099000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="I2C1">
+        <name>I2C1_SET</name>
+        <description>Atomic SET alias view of I2C1 (+0x2000)</description>
+        <baseAddress>0x4009A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="I2C1">
+        <name>I2C1_CLR</name>
+        <description>Atomic CLR alias view of I2C1 (+0x3000)</description>
+        <baseAddress>0x4009B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>SPI0</name>
         <baseAddress>0x40080000</baseAddress>
@@ -69848,6 +70328,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="SPI0">
+        <name>SPI0_XOR</name>
+        <description>Atomic XOR alias view of SPI0 (+0x1000)</description>
+        <baseAddress>0x40081000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SPI0">
+        <name>SPI0_SET</name>
+        <description>Atomic SET alias view of SPI0 (+0x2000)</description>
+        <baseAddress>0x40082000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SPI0">
+        <name>SPI0_CLR</name>
+        <description>Atomic CLR alias view of SPI0 (+0x3000)</description>
+        <baseAddress>0x40083000</baseAddress>
+    </peripheral>
     <peripheral derivedFrom="SPI0">
         <name>SPI1</name>
         <baseAddress>0x40088000</baseAddress>
@@ -69856,6 +70351,21 @@ SPDX-License-Identifier: BSD-3-Clause
         <value>32</value>
     </interrupt>
     </peripheral>
+    <peripheral derivedFrom="SPI1">
+        <name>SPI1_XOR</name>
+        <description>Atomic XOR alias view of SPI1 (+0x1000)</description>
+        <baseAddress>0x40089000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SPI1">
+        <name>SPI1_SET</name>
+        <description>Atomic SET alias view of SPI1 (+0x2000)</description>
+        <baseAddress>0x4008A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="SPI1">
+        <name>SPI1_CLR</name>
+        <description>Atomic CLR alias view of SPI1 (+0x3000)</description>
+        <baseAddress>0x4008B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>PIO0</name>
         <description>Programmable IO block</description>
@@ -72775,6 +73285,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="PIO0">
+        <name>PIO0_XOR</name>
+        <description>Atomic XOR alias view of PIO0 (+0x1000)</description>
+        <baseAddress>0x50201000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PIO0">
+        <name>PIO0_SET</name>
+        <description>Atomic SET alias view of PIO0 (+0x2000)</description>
+        <baseAddress>0x50202000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PIO0">
+        <name>PIO0_CLR</name>
+        <description>Atomic CLR alias view of PIO0 (+0x3000)</description>
+        <baseAddress>0x50203000</baseAddress>
+    </peripheral>
     <peripheral derivedFrom="PIO0">
         <name>PIO1</name>
         <baseAddress>0x50300000</baseAddress>
@@ -72787,6 +73312,21 @@ SPDX-License-Identifier: BSD-3-Clause
         <value>18</value>
     </interrupt>
     </peripheral>
+    <peripheral derivedFrom="PIO1">
+        <name>PIO1_XOR</name>
+        <description>Atomic XOR alias view of PIO1 (+0x1000)</description>
+        <baseAddress>0x50301000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PIO1">
+        <name>PIO1_SET</name>
+        <description>Atomic SET alias view of PIO1 (+0x2000)</description>
+        <baseAddress>0x50302000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PIO1">
+        <name>PIO1_CLR</name>
+        <description>Atomic CLR alias view of PIO1 (+0x3000)</description>
+        <baseAddress>0x50303000</baseAddress>
+    </peripheral>
     <peripheral derivedFrom="PIO0">
         <name>PIO2</name>
         <baseAddress>0x50400000</baseAddress>
@@ -72799,6 +73339,21 @@ SPDX-License-Identifier: BSD-3-Clause
         <value>20</value>
     </interrupt>
     </peripheral>
+    <peripheral derivedFrom="PIO2">
+        <name>PIO2_XOR</name>
+        <description>Atomic XOR alias view of PIO2 (+0x1000)</description>
+        <baseAddress>0x50401000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PIO2">
+        <name>PIO2_SET</name>
+        <description>Atomic SET alias view of PIO2 (+0x2000)</description>
+        <baseAddress>0x50402000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="PIO2">
+        <name>PIO2_CLR</name>
+        <description>Atomic CLR alias view of PIO2 (+0x3000)</description>
+        <baseAddress>0x50403000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>BUSCTRL</name>
         <description>Register block for busfabric control signals and performance counters</description>
@@ -74094,6 +74649,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="BUSCTRL">
+        <name>BUSCTRL_XOR</name>
+        <description>Atomic XOR alias view of BUSCTRL (+0x1000)</description>
+        <baseAddress>0x40069000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="BUSCTRL">
+        <name>BUSCTRL_SET</name>
+        <description>Atomic SET alias view of BUSCTRL (+0x2000)</description>
+        <baseAddress>0x4006A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="BUSCTRL">
+        <name>BUSCTRL_CLR</name>
+        <description>Atomic CLR alias view of BUSCTRL (+0x3000)</description>
+        <baseAddress>0x4006B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>SIO</name>
         <description>Single-cycle IO block 
@@ -76679,6 +77249,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="BOOTRAM">
+        <name>BOOTRAM_XOR</name>
+        <description>Atomic XOR alias view of BOOTRAM (+0x1000)</description>
+        <baseAddress>0x400e1000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="BOOTRAM">
+        <name>BOOTRAM_SET</name>
+        <description>Atomic SET alias view of BOOTRAM (+0x2000)</description>
+        <baseAddress>0x400e2000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="BOOTRAM">
+        <name>BOOTRAM_CLR</name>
+        <description>Atomic CLR alias view of BOOTRAM (+0x3000)</description>
+        <baseAddress>0x400e3000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>CORESIGHT_TRACE</name>
         <description>Coresight block - RP specific registers</description>
@@ -80055,6 +80640,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="USB">
+        <name>USB_XOR</name>
+        <description>Atomic XOR alias view of USB (+0x1000)</description>
+        <baseAddress>0x50111000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="USB">
+        <name>USB_SET</name>
+        <description>Atomic SET alias view of USB (+0x2000)</description>
+        <baseAddress>0x50112000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="USB">
+        <name>USB_CLR</name>
+        <description>Atomic CLR alias view of USB (+0x3000)</description>
+        <baseAddress>0x50113000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>TRNG</name>
         <description>ARM TrustZone RNG register block</description>
@@ -80603,6 +81203,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="TRNG">
+        <name>TRNG_XOR</name>
+        <description>Atomic XOR alias view of TRNG (+0x1000)</description>
+        <baseAddress>0x400F1000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TRNG">
+        <name>TRNG_SET</name>
+        <description>Atomic SET alias view of TRNG (+0x2000)</description>
+        <baseAddress>0x400F2000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TRNG">
+        <name>TRNG_CLR</name>
+        <description>Atomic CLR alias view of TRNG (+0x3000)</description>
+        <baseAddress>0x400F3000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>GLITCH_DETECTOR</name>
         <description>Glitch detector controls</description>
@@ -80812,6 +81427,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="GLITCH_DETECTOR">
+        <name>GLITCH_DETECTOR_XOR</name>
+        <description>Atomic XOR alias view of GLITCH_DETECTOR (+0x1000)</description>
+        <baseAddress>0x40159000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="GLITCH_DETECTOR">
+        <name>GLITCH_DETECTOR_SET</name>
+        <description>Atomic SET alias view of GLITCH_DETECTOR (+0x2000)</description>
+        <baseAddress>0x4015A000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="GLITCH_DETECTOR">
+        <name>GLITCH_DETECTOR_CLR</name>
+        <description>Atomic CLR alias view of GLITCH_DETECTOR (+0x3000)</description>
+        <baseAddress>0x4015B000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>OTP</name>
         <description>SNPS OTP control IF (SBPI and RPi wrapper control)</description>
@@ -100247,6 +100877,21 @@ SPDX-License-Identifier: BSD-3-Clause
             </register>
         </registers>
     </peripheral>
+    <peripheral derivedFrom="TBMAN">
+        <name>TBMAN_XOR</name>
+        <description>Atomic XOR alias view of TBMAN (+0x1000)</description>
+        <baseAddress>0x40161000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TBMAN">
+        <name>TBMAN_SET</name>
+        <description>Atomic SET alias view of TBMAN (+0x2000)</description>
+        <baseAddress>0x40162000</baseAddress>
+    </peripheral>
+    <peripheral derivedFrom="TBMAN">
+        <name>TBMAN_CLR</name>
+        <description>Atomic CLR alias view of TBMAN (+0x3000)</description>
+        <baseAddress>0x40163000</baseAddress>
+    </peripheral>
     <peripheral>
         <name>USB_DPRAM</name>
         <description>DPRAM layout for USB device.</description>

Open to suggestions for it! I don't think finding all the aliases will be terribly difficult (especially for you internally I'm just guessing based on the spec with limited experience).

> I don't know if we'll be making your suggested change to our SVD files, as I guess we'd need to do that for all peripherals, not just PADS_BANK0. And as you've highlighted, there are a lot of special-exceptions which would make this tricky to get right. I tried looking at the exceptions, but the datasheet is very unclear about it: > The following registers do not support atomic register access: > - SIO (Section 3.1), though _some_ individual registers (for example, GPIO) have set, clear, and XOR aliases. It says "for example, GPIO" but I cannot find any other examples (except maybe ACCESSCTRL?). I did some attempt myself to include the stuff actively used by the pico-sdk (which means you would encounter it while debugging): <details> <summary>More complete RP2350 SVD</summary> ```diff diff --git a/atomic_regs.diff b/atomic_regs.diff index c8b752c..e69de29 100644 --- a/atomic_regs.diff +++ b/atomic_regs.diff @@ -1,928 +0,0 @@ -diff --git a/src/rp2350/hardware_regs/RP2350.svd b/src/rp2350/hardware_regs/RP2350.svd -index dc2e1f2..70b21dc 100644 ---- a/src/rp2350/hardware_regs/RP2350.svd -+++ b/src/rp2350/hardware_regs/RP2350.svd -@@ -528,6 +528,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="RESETS"> -+ <name>RESETS_XOR</name> -+ <description>Atomic XOR alias view of RESETS (+0x1000)</description> -+ <baseAddress>0x40021000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="RESETS"> -+ <name>RESETS_SET</name> -+ <description>Atomic SET alias view of RESETS (+0x2000)</description> -+ <baseAddress>0x40022000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="RESETS"> -+ <name>RESETS_CLR</name> -+ <description>Atomic CLR alias view of RESETS (+0x3000)</description> -+ <baseAddress>0x40023000</baseAddress> -+ </peripheral> - <peripheral> - <name>PSM</name> - <baseAddress>0x40018000</baseAddress> -@@ -1071,6 +1086,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="PSM"> -+ <name>PSM_XOR</name> -+ <description>Atomic XOR alias view of PSM (+0x1000)</description> -+ <baseAddress>0x40019000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PSM"> -+ <name>PSM_SET</name> -+ <description>Atomic SET alias view of PSM (+0x2000)</description> -+ <baseAddress>0x4001A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PSM"> -+ <name>PSM_CLR</name> -+ <description>Atomic CLR alias view of PSM (+0x3000)</description> -+ <baseAddress>0x4001B000</baseAddress> -+ </peripheral> - <peripheral> - <name>CLOCKS</name> - <baseAddress>0x40010000</baseAddress> -@@ -3621,6 +3651,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="CLOCKS"> -+ <name>CLOCKS_XOR</name> -+ <description>Atomic XOR alias view of CLOCKS (+0x1000)</description> -+ <baseAddress>0x40011000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="CLOCKS"> -+ <name>CLOCKS_SET</name> -+ <description>Atomic SET alias view of CLOCKS (+0x2000)</description> -+ <baseAddress>0x40012000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="CLOCKS"> -+ <name>CLOCKS_CLR</name> -+ <description>Atomic CLR alias view of CLOCKS (+0x3000)</description> -+ <baseAddress>0x40013000</baseAddress> -+ </peripheral> - <peripheral> - <name>TICKS</name> - <baseAddress>0x40108000</baseAddress> -@@ -3908,6 +3953,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="TICKS"> -+ <name>TICKS_XOR</name> -+ <description>Atomic XOR alias view of TICKS (+0x1000)</description> -+ <baseAddress>0x40109000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TICKS"> -+ <name>TICKS_SET</name> -+ <description>Atomic SET alias view of TICKS (+0x2000)</description> -+ <baseAddress>0x4010A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TICKS"> -+ <name>TICKS_CLR</name> -+ <description>Atomic CLR alias view of TICKS (+0x3000)</description> -+ <baseAddress>0x4010B000</baseAddress> -+ </peripheral> - <peripheral> - <name>PADS_BANK0</name> - <baseAddress>0x40038000</baseAddress> -@@ -7594,6 +7654,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="PADS_BANK0"> -+ <name>PADS_BANK0_XOR</name> -+ <description>Atomic XOR alias view of PADS_BANK0 (+0x1000)</description> -+ <baseAddress>0x40039000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PADS_BANK0"> -+ <name>PADS_BANK0_SET</name> -+ <description>Atomic SET alias view of PADS_BANK0 (+0x2000)</description> -+ <baseAddress>0x4003A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PADS_BANK0"> -+ <name>PADS_BANK0_CLR</name> -+ <description>Atomic CLR alias view of PADS_BANK0 (+0x3000)</description> -+ <baseAddress>0x4003B000</baseAddress> -+ </peripheral> - <peripheral> - <name>PADS_QSPI</name> - <baseAddress>0x40040000</baseAddress> -@@ -8068,6 +8143,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="PADS_QSPI"> -+ <name>PADS_QSPI_XOR</name> -+ <description>Atomic XOR alias view of PADS_QSPI (+0x1000)</description> -+ <baseAddress>0x40041000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PADS_QSPI"> -+ <name>PADS_QSPI_SET</name> -+ <description>Atomic SET alias view of PADS_QSPI (+0x2000)</description> -+ <baseAddress>0x40042000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PADS_QSPI"> -+ <name>PADS_QSPI_CLR</name> -+ <description>Atomic CLR alias view of PADS_QSPI (+0x3000)</description> -+ <baseAddress>0x40043000</baseAddress> -+ </peripheral> - <peripheral> - <name>IO_QSPI</name> - <baseAddress>0x40030000</baseAddress> -@@ -11473,6 +11563,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="IO_QSPI"> -+ <name>IO_QSPI_XOR</name> -+ <description>Atomic XOR alias view of IO_QSPI (+0x1000)</description> -+ <baseAddress>0x40031000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="IO_QSPI"> -+ <name>IO_QSPI_SET</name> -+ <description>Atomic SET alias view of IO_QSPI (+0x2000)</description> -+ <baseAddress>0x40032000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="IO_QSPI"> -+ <name>IO_QSPI_CLR</name> -+ <description>Atomic CLR alias view of IO_QSPI (+0x3000)</description> -+ <baseAddress>0x40033000</baseAddress> -+ </peripheral> - <peripheral> - <name>IO_BANK0</name> - <baseAddress>0x40028000</baseAddress> -@@ -32772,6 +32877,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="IO_BANK0"> -+ <name>IO_BANK0_XOR</name> -+ <description>Atomic XOR alias view of IO_BANK0 (+0x1000)</description> -+ <baseAddress>0x40029000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="IO_BANK0"> -+ <name>IO_BANK0_SET</name> -+ <description>Atomic SET alias view of IO_BANK0 (+0x2000)</description> -+ <baseAddress>0x4002A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="IO_BANK0"> -+ <name>IO_BANK0_CLR</name> -+ <description>Atomic CLR alias view of IO_BANK0 (+0x3000)</description> -+ <baseAddress>0x4002B000</baseAddress> -+ </peripheral> - <peripheral> - <name>SYSINFO</name> - <baseAddress>0x40000000</baseAddress> -@@ -32869,6 +32989,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="SYSINFO"> -+ <name>SYSINFO_XOR</name> -+ <description>Atomic XOR alias view of SYSINFO (+0x1000)</description> -+ <baseAddress>0x40001000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SYSINFO"> -+ <name>SYSINFO_SET</name> -+ <description>Atomic SET alias view of SYSINFO (+0x2000)</description> -+ <baseAddress>0x40002000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SYSINFO"> -+ <name>SYSINFO_CLR</name> -+ <description>Atomic CLR alias view of SYSINFO (+0x3000)</description> -+ <baseAddress>0x40003000</baseAddress> -+ </peripheral> - <peripheral> - <name>SHA256</name> - <description>SHA-256 hash function implementation</description> -@@ -33080,6 +33215,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="SHA256"> -+ <name>SHA256_XOR</name> -+ <description>Atomic XOR alias view of SHA256 (+0x1000)</description> -+ <baseAddress>0x400F9000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SHA256"> -+ <name>SHA256_SET</name> -+ <description>Atomic SET alias view of SHA256 (+0x2000)</description> -+ <baseAddress>0x400FA000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SHA256"> -+ <name>SHA256_CLR</name> -+ <description>Atomic CLR alias view of SHA256 (+0x3000)</description> -+ <baseAddress>0x400FB000</baseAddress> -+ </peripheral> - <peripheral> - <name>HSTX_FIFO</name> - <description>FIFO status and write access for HSTX</description> -@@ -33135,6 +33285,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="HSTX_FIFO"> -+ <name>HSTX_FIFO_XOR</name> -+ <description>Atomic XOR alias view of HSTX_FIFO (+0x1000)</description> -+ <baseAddress>0x50601000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="HSTX_FIFO"> -+ <name>HSTX_FIFO_SET</name> -+ <description>Atomic SET alias view of HSTX_FIFO (+0x2000)</description> -+ <baseAddress>0x50602000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="HSTX_FIFO"> -+ <name>HSTX_FIFO_CLR</name> -+ <description>Atomic CLR alias view of HSTX_FIFO (+0x3000)</description> -+ <baseAddress>0x50603000</baseAddress> -+ </peripheral> - <peripheral> - <name>HSTX_CTRL</name> - <description>Control interface to HSTX. For FIFO write access and status, see the HSTX_FIFO register block.</description> -@@ -33568,6 +33733,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="HSTX_CTRL"> -+ <name>HSTX_CTRL_XOR</name> -+ <description>Atomic XOR alias view of HSTX_CTRL (+0x1000)</description> -+ <baseAddress>0x400C1000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="HSTX_CTRL"> -+ <name>HSTX_CTRL_SET</name> -+ <description>Atomic SET alias view of HSTX_CTRL (+0x2000)</description> -+ <baseAddress>0x400C2000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="HSTX_CTRL"> -+ <name>HSTX_CTRL_CLR</name> -+ <description>Atomic CLR alias view of HSTX_CTRL (+0x3000)</description> -+ <baseAddress>0x400C3000</baseAddress> -+ </peripheral> - <peripheral> - <name>EPPB</name> - <description>Cortex-M33 EPPB vendor register block for RP2350</description> -@@ -42695,6 +42875,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="QMI"> -+ <name>QMI_XOR</name> -+ <description>Atomic XOR alias view of QMI (+0x1000)</description> -+ <baseAddress>0x400D1000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="QMI"> -+ <name>QMI_SET</name> -+ <description>Atomic SET alias view of QMI (+0x2000)</description> -+ <baseAddress>0x400D2000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="QMI"> -+ <name>QMI_CLR</name> -+ <description>Atomic CLR alias view of QMI (+0x3000)</description> -+ <baseAddress>0x400D3000</baseAddress> -+ </peripheral> - <peripheral> - <name>XIP_CTRL</name> - <description>QSPI flash execute-in-place block</description> -@@ -42924,6 +43119,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="XIP_CTRL"> -+ <name>XIP_CTRL_XOR</name> -+ <description>Atomic XOR alias view of XIP_CTRL (+0x1000)</description> -+ <baseAddress>0x400C9000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="XIP_CTRL"> -+ <name>XIP_CTRL_SET</name> -+ <description>Atomic SET alias view of XIP_CTRL (+0x2000)</description> -+ <baseAddress>0x400CA000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="XIP_CTRL"> -+ <name>XIP_CTRL_CLR</name> -+ <description>Atomic CLR alias view of XIP_CTRL (+0x3000)</description> -+ <baseAddress>0x400CB000</baseAddress> -+ </peripheral> - <peripheral> - <name>XIP_AUX</name> - <description>Auxiliary DMA access to XIP FIFOs, via fast AHB bus access</description> -@@ -43028,6 +43238,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="XIP_AUX"> -+ <name>XIP_AUX_XOR</name> -+ <description>Atomic XOR alias view of XIP_AUX (+0x1000)</description> -+ <baseAddress>0x50501000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="XIP_AUX"> -+ <name>XIP_AUX_SET</name> -+ <description>Atomic SET alias view of XIP_AUX (+0x2000)</description> -+ <baseAddress>0x50502000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="XIP_AUX"> -+ <name>XIP_AUX_CLR</name> -+ <description>Atomic CLR alias view of XIP_AUX (+0x3000)</description> -+ <baseAddress>0x50503000</baseAddress> -+ </peripheral> - <peripheral> - <name>SYSCFG</name> - <description>Register block for various chip control signals</description> -@@ -43245,6 +43470,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="SYSCFG"> -+ <name>SYSCFG_XOR</name> -+ <description>Atomic XOR alias view of SYSCFG (+0x1000)</description> -+ <baseAddress>0x40009000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SYSCFG"> -+ <name>SYSCFG_SET</name> -+ <description>Atomic SET alias view of SYSCFG (+0x2000)</description> -+ <baseAddress>0x4000A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SYSCFG"> -+ <name>SYSCFG_CLR</name> -+ <description>Atomic CLR alias view of SYSCFG (+0x3000)</description> -+ <baseAddress>0x4000B000</baseAddress> -+ </peripheral> - <peripheral> - <name>XOSC</name> - <description>Controls the crystal oscillator</description> -@@ -43423,6 +43663,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="XOSC"> -+ <name>XOSC_XOR</name> -+ <description>Atomic XOR alias view of XOSC (+0x1000)</description> -+ <baseAddress>0x40049000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="XOSC"> -+ <name>XOSC_SET</name> -+ <description>Atomic SET alias view of XOSC (+0x2000)</description> -+ <baseAddress>0x4004A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="XOSC"> -+ <name>XOSC_CLR</name> -+ <description>Atomic CLR alias view of XOSC (+0x3000)</description> -+ <baseAddress>0x4004B000</baseAddress> -+ </peripheral> - <peripheral> - <name>PLL_SYS</name> - <baseAddress>0x40050000</baseAddress> -@@ -43604,6 +43859,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="PLL_SYS"> -+ <name>PLL_SYS_XOR</name> -+ <description>Atomic XOR alias view of PLL_SYS (+0x1000)</description> -+ <baseAddress>0x40051000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PLL_SYS"> -+ <name>PLL_SYS_SET</name> -+ <description>Atomic SET alias view of PLL_SYS (+0x2000)</description> -+ <baseAddress>0x40052000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PLL_SYS"> -+ <name>PLL_SYS_CLR</name> -+ <description>Atomic CLR alias view of PLL_SYS (+0x3000)</description> -+ <baseAddress>0x40053000</baseAddress> -+ </peripheral> - <peripheral derivedFrom="PLL_SYS"> - <name>PLL_USB</name> - <baseAddress>0x40058000</baseAddress> -@@ -43612,6 +43882,21 @@ SPDX-License-Identifier: BSD-3-Clause - <value>43</value> - </interrupt> - </peripheral> -+ <peripheral derivedFrom="PLL_USB"> -+ <name>PLL_USB_XOR</name> -+ <description>Atomic XOR alias view of PLL_USB (+0x1000)</description> -+ <baseAddress>0x40059000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PLL_USB"> -+ <name>PLL_USB_SET</name> -+ <description>Atomic SET alias view of PLL_USB (+0x2000)</description> -+ <baseAddress>0x4005A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PLL_USB"> -+ <name>PLL_USB_CLR</name> -+ <description>Atomic CLR alias view of PLL_USB (+0x3000)</description> -+ <baseAddress>0x4005B000</baseAddress> -+ </peripheral> - <peripheral> - <name>ACCESSCTRL</name> - <description>Hardware access control registers</description> -@@ -47091,6 +47376,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="ACCESSCTRL"> -+ <name>ACCESSCTRL_XOR</name> -+ <description>Atomic XOR alias view of ACCESSCTRL (+0x1000)</description> -+ <baseAddress>0x40061000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="ACCESSCTRL"> -+ <name>ACCESSCTRL_SET</name> -+ <description>Atomic SET alias view of ACCESSCTRL (+0x2000)</description> -+ <baseAddress>0x40062000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="ACCESSCTRL"> -+ <name>ACCESSCTRL_CLR</name> -+ <description>Atomic CLR alias view of ACCESSCTRL (+0x3000)</description> -+ <baseAddress>0x40063000</baseAddress> -+ </peripheral> - <peripheral> - <name>UART0</name> - <baseAddress>0x40070000</baseAddress> -@@ -47892,6 +48192,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="UART0"> -+ <name>UART0_XOR</name> -+ <description>Atomic XOR alias view of UART0 (+0x1000)</description> -+ <baseAddress>0x40071000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="UART0"> -+ <name>UART0_SET</name> -+ <description>Atomic SET alias view of UART0 (+0x2000)</description> -+ <baseAddress>0x40072000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="UART0"> -+ <name>UART0_CLR</name> -+ <description>Atomic CLR alias view of UART0 (+0x3000)</description> -+ <baseAddress>0x40073000</baseAddress> -+ </peripheral> - <peripheral derivedFrom="UART0"> - <name>UART1</name> - <baseAddress>0x40078000</baseAddress> -@@ -47900,6 +48215,21 @@ SPDX-License-Identifier: BSD-3-Clause - <value>34</value> - </interrupt> - </peripheral> -+ <peripheral derivedFrom="UART1"> -+ <name>UART1_XOR</name> -+ <description>Atomic XOR alias view of UART1 (+0x1000)</description> -+ <baseAddress>0x40079000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="UART1"> -+ <name>UART1_SET</name> -+ <description>Atomic SET alias view of UART1 (+0x2000)</description> -+ <baseAddress>0x4007A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="UART1"> -+ <name>UART1_CLR</name> -+ <description>Atomic CLR alias view of UART1 (+0x3000)</description> -+ <baseAddress>0x4007B000</baseAddress> -+ </peripheral> - <peripheral> - <name>ROSC</name> - <baseAddress>0x400e8000</baseAddress> -@@ -48241,6 +48571,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="ROSC"> -+ <name>ROSC_XOR</name> -+ <description>Atomic XOR alias view of ROSC (+0x1000)</description> -+ <baseAddress>0x400E9000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="ROSC"> -+ <name>ROSC_SET</name> -+ <description>Atomic SET alias view of ROSC (+0x2000)</description> -+ <baseAddress>0x400EA000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="ROSC"> -+ <name>ROSC_CLR</name> -+ <description>Atomic CLR alias view of ROSC (+0x3000)</description> -+ <baseAddress>0x400EB000</baseAddress> -+ </peripheral> - <peripheral> - <name>POWMAN</name> - <description>Controls vreg, bor, lposc, chip resets &amp; xosc startup, powman and provides scratch register for general use and for bootcode use</description> -@@ -50224,6 +50569,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="POWMAN"> -+ <name>POWMAN_XOR</name> -+ <description>Atomic XOR alias view of POWMAN (+0x1000)</description> -+ <baseAddress>0x40101000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="POWMAN"> -+ <name>POWMAN_SET</name> -+ <description>Atomic SET alias view of POWMAN (+0x2000)</description> -+ <baseAddress>0x40102000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="POWMAN"> -+ <name>POWMAN_CLR</name> -+ <description>Atomic CLR alias view of POWMAN (+0x3000)</description> -+ <baseAddress>0x40103000</baseAddress> -+ </peripheral> - <peripheral> - <name>WATCHDOG</name> - <baseAddress>0x400d8000</baseAddress> -@@ -50418,6 +50778,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="WATCHDOG"> -+ <name>WATCHDOG_XOR</name> -+ <description>Atomic XOR alias view of WATCHDOG (+0x1000)</description> -+ <baseAddress>0x400D9000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="WATCHDOG"> -+ <name>WATCHDOG_SET</name> -+ <description>Atomic SET alias view of WATCHDOG (+0x2000)</description> -+ <baseAddress>0x400DA000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="WATCHDOG"> -+ <name>WATCHDOG_CLR</name> -+ <description>Atomic CLR alias view of WATCHDOG (+0x3000)</description> -+ <baseAddress>0x400DB000</baseAddress> -+ </peripheral> - <peripheral> - <name>DMA</name> - <description>DMA with separate read and write masters</description> -@@ -63905,6 +64280,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="DMA"> -+ <name>DMA_XOR</name> -+ <description>Atomic XOR alias view of DMA (+0x1000)</description> -+ <baseAddress>0x50001000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="DMA"> -+ <name>DMA_SET</name> -+ <description>Atomic SET alias view of DMA (+0x2000)</description> -+ <baseAddress>0x50002000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="DMA"> -+ <name>DMA_CLR</name> -+ <description>Atomic CLR alias view of DMA (+0x3000)</description> -+ <baseAddress>0x50003000</baseAddress> -+ </peripheral> - <peripheral> - <name>TIMER0</name> - <description>Controls time and alarms -@@ -64269,6 +64659,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="TIMER0"> -+ <name>TIMER0_XOR</name> -+ <description>Atomic XOR alias view of TIMER0 (+0x1000)</description> -+ <baseAddress>0x400B1000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TIMER0"> -+ <name>TIMER0_SET</name> -+ <description>Atomic SET alias view of TIMER0 (+0x2000)</description> -+ <baseAddress>0x400B2000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TIMER0"> -+ <name>TIMER0_CLR</name> -+ <description>Atomic CLR alias view of TIMER0 (+0x3000)</description> -+ <baseAddress>0x400B3000</baseAddress> -+ </peripheral> - <peripheral derivedFrom="TIMER0"> - <name>TIMER1</name> - <baseAddress>0x400b8000</baseAddress> -@@ -64289,6 +64694,21 @@ SPDX-License-Identifier: BSD-3-Clause - <value>7</value> - </interrupt> - </peripheral> -+ <peripheral derivedFrom="TIMER1"> -+ <name>TIMER1_XOR</name> -+ <description>Atomic XOR alias view of TIMER1 (+0x1000)</description> -+ <baseAddress>0x400B9000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TIMER1"> -+ <name>TIMER1_SET</name> -+ <description>Atomic SET alias view of TIMER1 (+0x2000)</description> -+ <baseAddress>0x400BA000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TIMER1"> -+ <name>TIMER1_CLR</name> -+ <description>Atomic CLR alias view of TIMER1 (+0x3000)</description> -+ <baseAddress>0x400BB000</baseAddress> -+ </peripheral> - <peripheral> - <name>PWM</name> - <description>Simple PWM</description> -@@ -66525,6 +66945,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="PWM"> -+ <name>PWM_XOR</name> -+ <description>Atomic XOR alias view of PWM (+0x1000)</description> -+ <baseAddress>0x400A9000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PWM"> -+ <name>PWM_SET</name> -+ <description>Atomic SET alias view of PWM (+0x2000)</description> -+ <baseAddress>0x400AA000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PWM"> -+ <name>PWM_CLR</name> -+ <description>Atomic CLR alias view of PWM (+0x3000)</description> -+ <baseAddress>0x400AB000</baseAddress> -+ </peripheral> - <peripheral> - <name>ADC</name> - <description>Control and data interface to SAR ADC</description> -@@ -66795,6 +67230,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="ADC"> -+ <name>ADC_XOR</name> -+ <description>Atomic XOR alias view of ADC (+0x1000)</description> -+ <baseAddress>0x400A1000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="ADC"> -+ <name>ADC_SET</name> -+ <description>Atomic SET alias view of ADC (+0x2000)</description> -+ <baseAddress>0x400A2000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="ADC"> -+ <name>ADC_CLR</name> -+ <description>Atomic CLR alias view of ADC (+0x3000)</description> -+ <baseAddress>0x400A3000</baseAddress> -+ </peripheral> - <peripheral> - <name>I2C0</name> - <description>DW_apb_i2c address block -@@ -69426,6 +69876,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="I2C0"> -+ <name>I2C0_XOR</name> -+ <description>Atomic XOR alias view of I2C0 (+0x1000)</description> -+ <baseAddress>0x40091000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="I2C0"> -+ <name>I2C0_SET</name> -+ <description>Atomic SET alias view of I2C0 (+0x2000)</description> -+ <baseAddress>0x40092000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="I2C0"> -+ <name>I2C0_CLR</name> -+ <description>Atomic CLR alias view of I2C0 (+0x3000)</description> -+ <baseAddress>0x40093000</baseAddress> -+ </peripheral> - <peripheral derivedFrom="I2C0"> - <name>I2C1</name> - <baseAddress>0x40098000</baseAddress> -@@ -69434,6 +69899,21 @@ SPDX-License-Identifier: BSD-3-Clause - <value>37</value> - </interrupt> - </peripheral> -+ <peripheral derivedFrom="I2C1"> -+ <name>I2C1_XOR</name> -+ <description>Atomic XOR alias view of I2C1 (+0x1000)</description> -+ <baseAddress>0x40099000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="I2C1"> -+ <name>I2C1_SET</name> -+ <description>Atomic SET alias view of I2C1 (+0x2000)</description> -+ <baseAddress>0x4009A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="I2C1"> -+ <name>I2C1_CLR</name> -+ <description>Atomic CLR alias view of I2C1 (+0x3000)</description> -+ <baseAddress>0x4009B000</baseAddress> -+ </peripheral> - <peripheral> - <name>SPI0</name> - <baseAddress>0x40080000</baseAddress> -@@ -69848,6 +70328,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="SPI0"> -+ <name>SPI0_XOR</name> -+ <description>Atomic XOR alias view of SPI0 (+0x1000)</description> -+ <baseAddress>0x40081000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SPI0"> -+ <name>SPI0_SET</name> -+ <description>Atomic SET alias view of SPI0 (+0x2000)</description> -+ <baseAddress>0x40082000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SPI0"> -+ <name>SPI0_CLR</name> -+ <description>Atomic CLR alias view of SPI0 (+0x3000)</description> -+ <baseAddress>0x40083000</baseAddress> -+ </peripheral> - <peripheral derivedFrom="SPI0"> - <name>SPI1</name> - <baseAddress>0x40088000</baseAddress> -@@ -69856,6 +70351,21 @@ SPDX-License-Identifier: BSD-3-Clause - <value>32</value> - </interrupt> - </peripheral> -+ <peripheral derivedFrom="SPI1"> -+ <name>SPI1_XOR</name> -+ <description>Atomic XOR alias view of SPI1 (+0x1000)</description> -+ <baseAddress>0x40089000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SPI1"> -+ <name>SPI1_SET</name> -+ <description>Atomic SET alias view of SPI1 (+0x2000)</description> -+ <baseAddress>0x4008A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="SPI1"> -+ <name>SPI1_CLR</name> -+ <description>Atomic CLR alias view of SPI1 (+0x3000)</description> -+ <baseAddress>0x4008B000</baseAddress> -+ </peripheral> - <peripheral> - <name>PIO0</name> - <description>Programmable IO block</description> -@@ -72775,6 +73285,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="PIO0"> -+ <name>PIO0_XOR</name> -+ <description>Atomic XOR alias view of PIO0 (+0x1000)</description> -+ <baseAddress>0x50201000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PIO0"> -+ <name>PIO0_SET</name> -+ <description>Atomic SET alias view of PIO0 (+0x2000)</description> -+ <baseAddress>0x50202000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PIO0"> -+ <name>PIO0_CLR</name> -+ <description>Atomic CLR alias view of PIO0 (+0x3000)</description> -+ <baseAddress>0x50203000</baseAddress> -+ </peripheral> - <peripheral derivedFrom="PIO0"> - <name>PIO1</name> - <baseAddress>0x50300000</baseAddress> -@@ -72787,6 +73312,21 @@ SPDX-License-Identifier: BSD-3-Clause - <value>18</value> - </interrupt> - </peripheral> -+ <peripheral derivedFrom="PIO1"> -+ <name>PIO1_XOR</name> -+ <description>Atomic XOR alias view of PIO1 (+0x1000)</description> -+ <baseAddress>0x50301000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PIO1"> -+ <name>PIO1_SET</name> -+ <description>Atomic SET alias view of PIO1 (+0x2000)</description> -+ <baseAddress>0x50302000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PIO1"> -+ <name>PIO1_CLR</name> -+ <description>Atomic CLR alias view of PIO1 (+0x3000)</description> -+ <baseAddress>0x50303000</baseAddress> -+ </peripheral> - <peripheral derivedFrom="PIO0"> - <name>PIO2</name> - <baseAddress>0x50400000</baseAddress> -@@ -72799,6 +73339,21 @@ SPDX-License-Identifier: BSD-3-Clause - <value>20</value> - </interrupt> - </peripheral> -+ <peripheral derivedFrom="PIO2"> -+ <name>PIO2_XOR</name> -+ <description>Atomic XOR alias view of PIO2 (+0x1000)</description> -+ <baseAddress>0x50401000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PIO2"> -+ <name>PIO2_SET</name> -+ <description>Atomic SET alias view of PIO2 (+0x2000)</description> -+ <baseAddress>0x50402000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="PIO2"> -+ <name>PIO2_CLR</name> -+ <description>Atomic CLR alias view of PIO2 (+0x3000)</description> -+ <baseAddress>0x50403000</baseAddress> -+ </peripheral> - <peripheral> - <name>BUSCTRL</name> - <description>Register block for busfabric control signals and performance counters</description> -@@ -74094,6 +74649,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="BUSCTRL"> -+ <name>BUSCTRL_XOR</name> -+ <description>Atomic XOR alias view of BUSCTRL (+0x1000)</description> -+ <baseAddress>0x40069000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="BUSCTRL"> -+ <name>BUSCTRL_SET</name> -+ <description>Atomic SET alias view of BUSCTRL (+0x2000)</description> -+ <baseAddress>0x4006A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="BUSCTRL"> -+ <name>BUSCTRL_CLR</name> -+ <description>Atomic CLR alias view of BUSCTRL (+0x3000)</description> -+ <baseAddress>0x4006B000</baseAddress> -+ </peripheral> - <peripheral> - <name>SIO</name> - <description>Single-cycle IO block -@@ -80055,6 +80625,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="USB"> -+ <name>USB_XOR</name> -+ <description>Atomic XOR alias view of USB (+0x1000)</description> -+ <baseAddress>0x50111000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="USB"> -+ <name>USB_SET</name> -+ <description>Atomic SET alias view of USB (+0x2000)</description> -+ <baseAddress>0x50112000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="USB"> -+ <name>USB_CLR</name> -+ <description>Atomic CLR alias view of USB (+0x3000)</description> -+ <baseAddress>0x50113000</baseAddress> -+ </peripheral> - <peripheral> - <name>TRNG</name> - <description>ARM TrustZone RNG register block</description> -@@ -80603,6 +81188,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="TRNG"> -+ <name>TRNG_XOR</name> -+ <description>Atomic XOR alias view of TRNG (+0x1000)</description> -+ <baseAddress>0x400F1000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TRNG"> -+ <name>TRNG_SET</name> -+ <description>Atomic SET alias view of TRNG (+0x2000)</description> -+ <baseAddress>0x400F2000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TRNG"> -+ <name>TRNG_CLR</name> -+ <description>Atomic CLR alias view of TRNG (+0x3000)</description> -+ <baseAddress>0x400F3000</baseAddress> -+ </peripheral> - <peripheral> - <name>GLITCH_DETECTOR</name> - <description>Glitch detector controls</description> -@@ -80812,6 +81412,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="GLITCH_DETECTOR"> -+ <name>GLITCH_DETECTOR_XOR</name> -+ <description>Atomic XOR alias view of GLITCH_DETECTOR (+0x1000)</description> -+ <baseAddress>0x40159000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="GLITCH_DETECTOR"> -+ <name>GLITCH_DETECTOR_SET</name> -+ <description>Atomic SET alias view of GLITCH_DETECTOR (+0x2000)</description> -+ <baseAddress>0x4015A000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="GLITCH_DETECTOR"> -+ <name>GLITCH_DETECTOR_CLR</name> -+ <description>Atomic CLR alias view of GLITCH_DETECTOR (+0x3000)</description> -+ <baseAddress>0x4015B000</baseAddress> -+ </peripheral> - <peripheral> - <name>OTP</name> - <description>SNPS OTP control IF (SBPI and RPi wrapper control)</description> -@@ -100247,6 +100862,21 @@ SPDX-License-Identifier: BSD-3-Clause - </register> - </registers> - </peripheral> -+ <peripheral derivedFrom="TBMAN"> -+ <name>TBMAN_XOR</name> -+ <description>Atomic XOR alias view of TBMAN (+0x1000)</description> -+ <baseAddress>0x40161000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TBMAN"> -+ <name>TBMAN_SET</name> -+ <description>Atomic SET alias view of TBMAN (+0x2000)</description> -+ <baseAddress>0x40162000</baseAddress> -+ </peripheral> -+ <peripheral derivedFrom="TBMAN"> -+ <name>TBMAN_CLR</name> -+ <description>Atomic CLR alias view of TBMAN (+0x3000)</description> -+ <baseAddress>0x40163000</baseAddress> -+ </peripheral> - <peripheral> - <name>USB_DPRAM</name> - <description>DPRAM layout for USB device.</description> diff --git a/src/rp2350/hardware_regs/RP2350.svd b/src/rp2350/hardware_regs/RP2350.svd index dc2e1f2..854ee95 100644 --- a/src/rp2350/hardware_regs/RP2350.svd +++ b/src/rp2350/hardware_regs/RP2350.svd @@ -528,6 +528,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="RESETS"> + <name>RESETS_XOR</name> + <description>Atomic XOR alias view of RESETS (+0x1000)</description> + <baseAddress>0x40021000</baseAddress> + </peripheral> + <peripheral derivedFrom="RESETS"> + <name>RESETS_SET</name> + <description>Atomic SET alias view of RESETS (+0x2000)</description> + <baseAddress>0x40022000</baseAddress> + </peripheral> + <peripheral derivedFrom="RESETS"> + <name>RESETS_CLR</name> + <description>Atomic CLR alias view of RESETS (+0x3000)</description> + <baseAddress>0x40023000</baseAddress> + </peripheral> <peripheral> <name>PSM</name> <baseAddress>0x40018000</baseAddress> @@ -1071,6 +1086,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="PSM"> + <name>PSM_XOR</name> + <description>Atomic XOR alias view of PSM (+0x1000)</description> + <baseAddress>0x40019000</baseAddress> + </peripheral> + <peripheral derivedFrom="PSM"> + <name>PSM_SET</name> + <description>Atomic SET alias view of PSM (+0x2000)</description> + <baseAddress>0x4001A000</baseAddress> + </peripheral> + <peripheral derivedFrom="PSM"> + <name>PSM_CLR</name> + <description>Atomic CLR alias view of PSM (+0x3000)</description> + <baseAddress>0x4001B000</baseAddress> + </peripheral> <peripheral> <name>CLOCKS</name> <baseAddress>0x40010000</baseAddress> @@ -3621,6 +3651,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="CLOCKS"> + <name>CLOCKS_XOR</name> + <description>Atomic XOR alias view of CLOCKS (+0x1000)</description> + <baseAddress>0x40011000</baseAddress> + </peripheral> + <peripheral derivedFrom="CLOCKS"> + <name>CLOCKS_SET</name> + <description>Atomic SET alias view of CLOCKS (+0x2000)</description> + <baseAddress>0x40012000</baseAddress> + </peripheral> + <peripheral derivedFrom="CLOCKS"> + <name>CLOCKS_CLR</name> + <description>Atomic CLR alias view of CLOCKS (+0x3000)</description> + <baseAddress>0x40013000</baseAddress> + </peripheral> <peripheral> <name>TICKS</name> <baseAddress>0x40108000</baseAddress> @@ -3908,6 +3953,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="TICKS"> + <name>TICKS_XOR</name> + <description>Atomic XOR alias view of TICKS (+0x1000)</description> + <baseAddress>0x40109000</baseAddress> + </peripheral> + <peripheral derivedFrom="TICKS"> + <name>TICKS_SET</name> + <description>Atomic SET alias view of TICKS (+0x2000)</description> + <baseAddress>0x4010A000</baseAddress> + </peripheral> + <peripheral derivedFrom="TICKS"> + <name>TICKS_CLR</name> + <description>Atomic CLR alias view of TICKS (+0x3000)</description> + <baseAddress>0x4010B000</baseAddress> + </peripheral> <peripheral> <name>PADS_BANK0</name> <baseAddress>0x40038000</baseAddress> @@ -7594,6 +7654,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="PADS_BANK0"> + <name>PADS_BANK0_XOR</name> + <description>Atomic XOR alias view of PADS_BANK0 (+0x1000)</description> + <baseAddress>0x40039000</baseAddress> + </peripheral> + <peripheral derivedFrom="PADS_BANK0"> + <name>PADS_BANK0_SET</name> + <description>Atomic SET alias view of PADS_BANK0 (+0x2000)</description> + <baseAddress>0x4003A000</baseAddress> + </peripheral> + <peripheral derivedFrom="PADS_BANK0"> + <name>PADS_BANK0_CLR</name> + <description>Atomic CLR alias view of PADS_BANK0 (+0x3000)</description> + <baseAddress>0x4003B000</baseAddress> + </peripheral> <peripheral> <name>PADS_QSPI</name> <baseAddress>0x40040000</baseAddress> @@ -8068,6 +8143,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="PADS_QSPI"> + <name>PADS_QSPI_XOR</name> + <description>Atomic XOR alias view of PADS_QSPI (+0x1000)</description> + <baseAddress>0x40041000</baseAddress> + </peripheral> + <peripheral derivedFrom="PADS_QSPI"> + <name>PADS_QSPI_SET</name> + <description>Atomic SET alias view of PADS_QSPI (+0x2000)</description> + <baseAddress>0x40042000</baseAddress> + </peripheral> + <peripheral derivedFrom="PADS_QSPI"> + <name>PADS_QSPI_CLR</name> + <description>Atomic CLR alias view of PADS_QSPI (+0x3000)</description> + <baseAddress>0x40043000</baseAddress> + </peripheral> <peripheral> <name>IO_QSPI</name> <baseAddress>0x40030000</baseAddress> @@ -11473,6 +11563,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="IO_QSPI"> + <name>IO_QSPI_XOR</name> + <description>Atomic XOR alias view of IO_QSPI (+0x1000)</description> + <baseAddress>0x40031000</baseAddress> + </peripheral> + <peripheral derivedFrom="IO_QSPI"> + <name>IO_QSPI_SET</name> + <description>Atomic SET alias view of IO_QSPI (+0x2000)</description> + <baseAddress>0x40032000</baseAddress> + </peripheral> + <peripheral derivedFrom="IO_QSPI"> + <name>IO_QSPI_CLR</name> + <description>Atomic CLR alias view of IO_QSPI (+0x3000)</description> + <baseAddress>0x40033000</baseAddress> + </peripheral> <peripheral> <name>IO_BANK0</name> <baseAddress>0x40028000</baseAddress> @@ -32772,6 +32877,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="IO_BANK0"> + <name>IO_BANK0_XOR</name> + <description>Atomic XOR alias view of IO_BANK0 (+0x1000)</description> + <baseAddress>0x40029000</baseAddress> + </peripheral> + <peripheral derivedFrom="IO_BANK0"> + <name>IO_BANK0_SET</name> + <description>Atomic SET alias view of IO_BANK0 (+0x2000)</description> + <baseAddress>0x4002A000</baseAddress> + </peripheral> + <peripheral derivedFrom="IO_BANK0"> + <name>IO_BANK0_CLR</name> + <description>Atomic CLR alias view of IO_BANK0 (+0x3000)</description> + <baseAddress>0x4002B000</baseAddress> + </peripheral> <peripheral> <name>SYSINFO</name> <baseAddress>0x40000000</baseAddress> @@ -32869,6 +32989,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="SYSINFO"> + <name>SYSINFO_XOR</name> + <description>Atomic XOR alias view of SYSINFO (+0x1000)</description> + <baseAddress>0x40001000</baseAddress> + </peripheral> + <peripheral derivedFrom="SYSINFO"> + <name>SYSINFO_SET</name> + <description>Atomic SET alias view of SYSINFO (+0x2000)</description> + <baseAddress>0x40002000</baseAddress> + </peripheral> + <peripheral derivedFrom="SYSINFO"> + <name>SYSINFO_CLR</name> + <description>Atomic CLR alias view of SYSINFO (+0x3000)</description> + <baseAddress>0x40003000</baseAddress> + </peripheral> <peripheral> <name>SHA256</name> <description>SHA-256 hash function implementation</description> @@ -33080,6 +33215,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="SHA256"> + <name>SHA256_XOR</name> + <description>Atomic XOR alias view of SHA256 (+0x1000)</description> + <baseAddress>0x400F9000</baseAddress> + </peripheral> + <peripheral derivedFrom="SHA256"> + <name>SHA256_SET</name> + <description>Atomic SET alias view of SHA256 (+0x2000)</description> + <baseAddress>0x400FA000</baseAddress> + </peripheral> + <peripheral derivedFrom="SHA256"> + <name>SHA256_CLR</name> + <description>Atomic CLR alias view of SHA256 (+0x3000)</description> + <baseAddress>0x400FB000</baseAddress> + </peripheral> <peripheral> <name>HSTX_FIFO</name> <description>FIFO status and write access for HSTX</description> @@ -33135,6 +33285,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="HSTX_FIFO"> + <name>HSTX_FIFO_XOR</name> + <description>Atomic XOR alias view of HSTX_FIFO (+0x1000)</description> + <baseAddress>0x50601000</baseAddress> + </peripheral> + <peripheral derivedFrom="HSTX_FIFO"> + <name>HSTX_FIFO_SET</name> + <description>Atomic SET alias view of HSTX_FIFO (+0x2000)</description> + <baseAddress>0x50602000</baseAddress> + </peripheral> + <peripheral derivedFrom="HSTX_FIFO"> + <name>HSTX_FIFO_CLR</name> + <description>Atomic CLR alias view of HSTX_FIFO (+0x3000)</description> + <baseAddress>0x50603000</baseAddress> + </peripheral> <peripheral> <name>HSTX_CTRL</name> <description>Control interface to HSTX. For FIFO write access and status, see the HSTX_FIFO register block.</description> @@ -33568,6 +33733,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="HSTX_CTRL"> + <name>HSTX_CTRL_XOR</name> + <description>Atomic XOR alias view of HSTX_CTRL (+0x1000)</description> + <baseAddress>0x400C1000</baseAddress> + </peripheral> + <peripheral derivedFrom="HSTX_CTRL"> + <name>HSTX_CTRL_SET</name> + <description>Atomic SET alias view of HSTX_CTRL (+0x2000)</description> + <baseAddress>0x400C2000</baseAddress> + </peripheral> + <peripheral derivedFrom="HSTX_CTRL"> + <name>HSTX_CTRL_CLR</name> + <description>Atomic CLR alias view of HSTX_CTRL (+0x3000)</description> + <baseAddress>0x400C3000</baseAddress> + </peripheral> <peripheral> <name>EPPB</name> <description>Cortex-M33 EPPB vendor register block for RP2350</description> @@ -42695,6 +42875,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="QMI"> + <name>QMI_XOR</name> + <description>Atomic XOR alias view of QMI (+0x1000)</description> + <baseAddress>0x400D1000</baseAddress> + </peripheral> + <peripheral derivedFrom="QMI"> + <name>QMI_SET</name> + <description>Atomic SET alias view of QMI (+0x2000)</description> + <baseAddress>0x400D2000</baseAddress> + </peripheral> + <peripheral derivedFrom="QMI"> + <name>QMI_CLR</name> + <description>Atomic CLR alias view of QMI (+0x3000)</description> + <baseAddress>0x400D3000</baseAddress> + </peripheral> <peripheral> <name>XIP_CTRL</name> <description>QSPI flash execute-in-place block</description> @@ -42924,6 +43119,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="XIP_CTRL"> + <name>XIP_CTRL_XOR</name> + <description>Atomic XOR alias view of XIP_CTRL (+0x1000)</description> + <baseAddress>0x400C9000</baseAddress> + </peripheral> + <peripheral derivedFrom="XIP_CTRL"> + <name>XIP_CTRL_SET</name> + <description>Atomic SET alias view of XIP_CTRL (+0x2000)</description> + <baseAddress>0x400CA000</baseAddress> + </peripheral> + <peripheral derivedFrom="XIP_CTRL"> + <name>XIP_CTRL_CLR</name> + <description>Atomic CLR alias view of XIP_CTRL (+0x3000)</description> + <baseAddress>0x400CB000</baseAddress> + </peripheral> <peripheral> <name>XIP_AUX</name> <description>Auxiliary DMA access to XIP FIFOs, via fast AHB bus access</description> @@ -43028,6 +43238,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="XIP_AUX"> + <name>XIP_AUX_XOR</name> + <description>Atomic XOR alias view of XIP_AUX (+0x1000)</description> + <baseAddress>0x50501000</baseAddress> + </peripheral> + <peripheral derivedFrom="XIP_AUX"> + <name>XIP_AUX_SET</name> + <description>Atomic SET alias view of XIP_AUX (+0x2000)</description> + <baseAddress>0x50502000</baseAddress> + </peripheral> + <peripheral derivedFrom="XIP_AUX"> + <name>XIP_AUX_CLR</name> + <description>Atomic CLR alias view of XIP_AUX (+0x3000)</description> + <baseAddress>0x50503000</baseAddress> + </peripheral> <peripheral> <name>SYSCFG</name> <description>Register block for various chip control signals</description> @@ -43245,6 +43470,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="SYSCFG"> + <name>SYSCFG_XOR</name> + <description>Atomic XOR alias view of SYSCFG (+0x1000)</description> + <baseAddress>0x40009000</baseAddress> + </peripheral> + <peripheral derivedFrom="SYSCFG"> + <name>SYSCFG_SET</name> + <description>Atomic SET alias view of SYSCFG (+0x2000)</description> + <baseAddress>0x4000A000</baseAddress> + </peripheral> + <peripheral derivedFrom="SYSCFG"> + <name>SYSCFG_CLR</name> + <description>Atomic CLR alias view of SYSCFG (+0x3000)</description> + <baseAddress>0x4000B000</baseAddress> + </peripheral> <peripheral> <name>XOSC</name> <description>Controls the crystal oscillator</description> @@ -43423,6 +43663,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="XOSC"> + <name>XOSC_XOR</name> + <description>Atomic XOR alias view of XOSC (+0x1000)</description> + <baseAddress>0x40049000</baseAddress> + </peripheral> + <peripheral derivedFrom="XOSC"> + <name>XOSC_SET</name> + <description>Atomic SET alias view of XOSC (+0x2000)</description> + <baseAddress>0x4004A000</baseAddress> + </peripheral> + <peripheral derivedFrom="XOSC"> + <name>XOSC_CLR</name> + <description>Atomic CLR alias view of XOSC (+0x3000)</description> + <baseAddress>0x4004B000</baseAddress> + </peripheral> <peripheral> <name>PLL_SYS</name> <baseAddress>0x40050000</baseAddress> @@ -43604,6 +43859,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="PLL_SYS"> + <name>PLL_SYS_XOR</name> + <description>Atomic XOR alias view of PLL_SYS (+0x1000)</description> + <baseAddress>0x40051000</baseAddress> + </peripheral> + <peripheral derivedFrom="PLL_SYS"> + <name>PLL_SYS_SET</name> + <description>Atomic SET alias view of PLL_SYS (+0x2000)</description> + <baseAddress>0x40052000</baseAddress> + </peripheral> + <peripheral derivedFrom="PLL_SYS"> + <name>PLL_SYS_CLR</name> + <description>Atomic CLR alias view of PLL_SYS (+0x3000)</description> + <baseAddress>0x40053000</baseAddress> + </peripheral> <peripheral derivedFrom="PLL_SYS"> <name>PLL_USB</name> <baseAddress>0x40058000</baseAddress> @@ -43612,6 +43882,21 @@ SPDX-License-Identifier: BSD-3-Clause <value>43</value> </interrupt> </peripheral> + <peripheral derivedFrom="PLL_USB"> + <name>PLL_USB_XOR</name> + <description>Atomic XOR alias view of PLL_USB (+0x1000)</description> + <baseAddress>0x40059000</baseAddress> + </peripheral> + <peripheral derivedFrom="PLL_USB"> + <name>PLL_USB_SET</name> + <description>Atomic SET alias view of PLL_USB (+0x2000)</description> + <baseAddress>0x4005A000</baseAddress> + </peripheral> + <peripheral derivedFrom="PLL_USB"> + <name>PLL_USB_CLR</name> + <description>Atomic CLR alias view of PLL_USB (+0x3000)</description> + <baseAddress>0x4005B000</baseAddress> + </peripheral> <peripheral> <name>ACCESSCTRL</name> <description>Hardware access control registers</description> @@ -47091,6 +47376,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="ACCESSCTRL"> + <name>ACCESSCTRL_XOR</name> + <description>Atomic XOR alias view of ACCESSCTRL (+0x1000)</description> + <baseAddress>0x40061000</baseAddress> + </peripheral> + <peripheral derivedFrom="ACCESSCTRL"> + <name>ACCESSCTRL_SET</name> + <description>Atomic SET alias view of ACCESSCTRL (+0x2000)</description> + <baseAddress>0x40062000</baseAddress> + </peripheral> + <peripheral derivedFrom="ACCESSCTRL"> + <name>ACCESSCTRL_CLR</name> + <description>Atomic CLR alias view of ACCESSCTRL (+0x3000)</description> + <baseAddress>0x40063000</baseAddress> + </peripheral> <peripheral> <name>UART0</name> <baseAddress>0x40070000</baseAddress> @@ -47892,6 +48192,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="UART0"> + <name>UART0_XOR</name> + <description>Atomic XOR alias view of UART0 (+0x1000)</description> + <baseAddress>0x40071000</baseAddress> + </peripheral> + <peripheral derivedFrom="UART0"> + <name>UART0_SET</name> + <description>Atomic SET alias view of UART0 (+0x2000)</description> + <baseAddress>0x40072000</baseAddress> + </peripheral> + <peripheral derivedFrom="UART0"> + <name>UART0_CLR</name> + <description>Atomic CLR alias view of UART0 (+0x3000)</description> + <baseAddress>0x40073000</baseAddress> + </peripheral> <peripheral derivedFrom="UART0"> <name>UART1</name> <baseAddress>0x40078000</baseAddress> @@ -47900,6 +48215,21 @@ SPDX-License-Identifier: BSD-3-Clause <value>34</value> </interrupt> </peripheral> + <peripheral derivedFrom="UART1"> + <name>UART1_XOR</name> + <description>Atomic XOR alias view of UART1 (+0x1000)</description> + <baseAddress>0x40079000</baseAddress> + </peripheral> + <peripheral derivedFrom="UART1"> + <name>UART1_SET</name> + <description>Atomic SET alias view of UART1 (+0x2000)</description> + <baseAddress>0x4007A000</baseAddress> + </peripheral> + <peripheral derivedFrom="UART1"> + <name>UART1_CLR</name> + <description>Atomic CLR alias view of UART1 (+0x3000)</description> + <baseAddress>0x4007B000</baseAddress> + </peripheral> <peripheral> <name>ROSC</name> <baseAddress>0x400e8000</baseAddress> @@ -48241,6 +48571,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="ROSC"> + <name>ROSC_XOR</name> + <description>Atomic XOR alias view of ROSC (+0x1000)</description> + <baseAddress>0x400E9000</baseAddress> + </peripheral> + <peripheral derivedFrom="ROSC"> + <name>ROSC_SET</name> + <description>Atomic SET alias view of ROSC (+0x2000)</description> + <baseAddress>0x400EA000</baseAddress> + </peripheral> + <peripheral derivedFrom="ROSC"> + <name>ROSC_CLR</name> + <description>Atomic CLR alias view of ROSC (+0x3000)</description> + <baseAddress>0x400EB000</baseAddress> + </peripheral> <peripheral> <name>POWMAN</name> <description>Controls vreg, bor, lposc, chip resets &amp; xosc startup, powman and provides scratch register for general use and for bootcode use</description> @@ -50224,6 +50569,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="POWMAN"> + <name>POWMAN_XOR</name> + <description>Atomic XOR alias view of POWMAN (+0x1000)</description> + <baseAddress>0x40101000</baseAddress> + </peripheral> + <peripheral derivedFrom="POWMAN"> + <name>POWMAN_SET</name> + <description>Atomic SET alias view of POWMAN (+0x2000)</description> + <baseAddress>0x40102000</baseAddress> + </peripheral> + <peripheral derivedFrom="POWMAN"> + <name>POWMAN_CLR</name> + <description>Atomic CLR alias view of POWMAN (+0x3000)</description> + <baseAddress>0x40103000</baseAddress> + </peripheral> <peripheral> <name>WATCHDOG</name> <baseAddress>0x400d8000</baseAddress> @@ -50418,6 +50778,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="WATCHDOG"> + <name>WATCHDOG_XOR</name> + <description>Atomic XOR alias view of WATCHDOG (+0x1000)</description> + <baseAddress>0x400D9000</baseAddress> + </peripheral> + <peripheral derivedFrom="WATCHDOG"> + <name>WATCHDOG_SET</name> + <description>Atomic SET alias view of WATCHDOG (+0x2000)</description> + <baseAddress>0x400DA000</baseAddress> + </peripheral> + <peripheral derivedFrom="WATCHDOG"> + <name>WATCHDOG_CLR</name> + <description>Atomic CLR alias view of WATCHDOG (+0x3000)</description> + <baseAddress>0x400DB000</baseAddress> + </peripheral> <peripheral> <name>DMA</name> <description>DMA with separate read and write masters</description> @@ -63905,6 +64280,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="DMA"> + <name>DMA_XOR</name> + <description>Atomic XOR alias view of DMA (+0x1000)</description> + <baseAddress>0x50001000</baseAddress> + </peripheral> + <peripheral derivedFrom="DMA"> + <name>DMA_SET</name> + <description>Atomic SET alias view of DMA (+0x2000)</description> + <baseAddress>0x50002000</baseAddress> + </peripheral> + <peripheral derivedFrom="DMA"> + <name>DMA_CLR</name> + <description>Atomic CLR alias view of DMA (+0x3000)</description> + <baseAddress>0x50003000</baseAddress> + </peripheral> <peripheral> <name>TIMER0</name> <description>Controls time and alarms @@ -64269,6 +64659,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="TIMER0"> + <name>TIMER0_XOR</name> + <description>Atomic XOR alias view of TIMER0 (+0x1000)</description> + <baseAddress>0x400B1000</baseAddress> + </peripheral> + <peripheral derivedFrom="TIMER0"> + <name>TIMER0_SET</name> + <description>Atomic SET alias view of TIMER0 (+0x2000)</description> + <baseAddress>0x400B2000</baseAddress> + </peripheral> + <peripheral derivedFrom="TIMER0"> + <name>TIMER0_CLR</name> + <description>Atomic CLR alias view of TIMER0 (+0x3000)</description> + <baseAddress>0x400B3000</baseAddress> + </peripheral> <peripheral derivedFrom="TIMER0"> <name>TIMER1</name> <baseAddress>0x400b8000</baseAddress> @@ -64289,6 +64694,21 @@ SPDX-License-Identifier: BSD-3-Clause <value>7</value> </interrupt> </peripheral> + <peripheral derivedFrom="TIMER1"> + <name>TIMER1_XOR</name> + <description>Atomic XOR alias view of TIMER1 (+0x1000)</description> + <baseAddress>0x400B9000</baseAddress> + </peripheral> + <peripheral derivedFrom="TIMER1"> + <name>TIMER1_SET</name> + <description>Atomic SET alias view of TIMER1 (+0x2000)</description> + <baseAddress>0x400BA000</baseAddress> + </peripheral> + <peripheral derivedFrom="TIMER1"> + <name>TIMER1_CLR</name> + <description>Atomic CLR alias view of TIMER1 (+0x3000)</description> + <baseAddress>0x400BB000</baseAddress> + </peripheral> <peripheral> <name>PWM</name> <description>Simple PWM</description> @@ -66525,6 +66945,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="PWM"> + <name>PWM_XOR</name> + <description>Atomic XOR alias view of PWM (+0x1000)</description> + <baseAddress>0x400A9000</baseAddress> + </peripheral> + <peripheral derivedFrom="PWM"> + <name>PWM_SET</name> + <description>Atomic SET alias view of PWM (+0x2000)</description> + <baseAddress>0x400AA000</baseAddress> + </peripheral> + <peripheral derivedFrom="PWM"> + <name>PWM_CLR</name> + <description>Atomic CLR alias view of PWM (+0x3000)</description> + <baseAddress>0x400AB000</baseAddress> + </peripheral> <peripheral> <name>ADC</name> <description>Control and data interface to SAR ADC</description> @@ -66795,6 +67230,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="ADC"> + <name>ADC_XOR</name> + <description>Atomic XOR alias view of ADC (+0x1000)</description> + <baseAddress>0x400A1000</baseAddress> + </peripheral> + <peripheral derivedFrom="ADC"> + <name>ADC_SET</name> + <description>Atomic SET alias view of ADC (+0x2000)</description> + <baseAddress>0x400A2000</baseAddress> + </peripheral> + <peripheral derivedFrom="ADC"> + <name>ADC_CLR</name> + <description>Atomic CLR alias view of ADC (+0x3000)</description> + <baseAddress>0x400A3000</baseAddress> + </peripheral> <peripheral> <name>I2C0</name> <description>DW_apb_i2c address block @@ -69426,6 +69876,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="I2C0"> + <name>I2C0_XOR</name> + <description>Atomic XOR alias view of I2C0 (+0x1000)</description> + <baseAddress>0x40091000</baseAddress> + </peripheral> + <peripheral derivedFrom="I2C0"> + <name>I2C0_SET</name> + <description>Atomic SET alias view of I2C0 (+0x2000)</description> + <baseAddress>0x40092000</baseAddress> + </peripheral> + <peripheral derivedFrom="I2C0"> + <name>I2C0_CLR</name> + <description>Atomic CLR alias view of I2C0 (+0x3000)</description> + <baseAddress>0x40093000</baseAddress> + </peripheral> <peripheral derivedFrom="I2C0"> <name>I2C1</name> <baseAddress>0x40098000</baseAddress> @@ -69434,6 +69899,21 @@ SPDX-License-Identifier: BSD-3-Clause <value>37</value> </interrupt> </peripheral> + <peripheral derivedFrom="I2C1"> + <name>I2C1_XOR</name> + <description>Atomic XOR alias view of I2C1 (+0x1000)</description> + <baseAddress>0x40099000</baseAddress> + </peripheral> + <peripheral derivedFrom="I2C1"> + <name>I2C1_SET</name> + <description>Atomic SET alias view of I2C1 (+0x2000)</description> + <baseAddress>0x4009A000</baseAddress> + </peripheral> + <peripheral derivedFrom="I2C1"> + <name>I2C1_CLR</name> + <description>Atomic CLR alias view of I2C1 (+0x3000)</description> + <baseAddress>0x4009B000</baseAddress> + </peripheral> <peripheral> <name>SPI0</name> <baseAddress>0x40080000</baseAddress> @@ -69848,6 +70328,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="SPI0"> + <name>SPI0_XOR</name> + <description>Atomic XOR alias view of SPI0 (+0x1000)</description> + <baseAddress>0x40081000</baseAddress> + </peripheral> + <peripheral derivedFrom="SPI0"> + <name>SPI0_SET</name> + <description>Atomic SET alias view of SPI0 (+0x2000)</description> + <baseAddress>0x40082000</baseAddress> + </peripheral> + <peripheral derivedFrom="SPI0"> + <name>SPI0_CLR</name> + <description>Atomic CLR alias view of SPI0 (+0x3000)</description> + <baseAddress>0x40083000</baseAddress> + </peripheral> <peripheral derivedFrom="SPI0"> <name>SPI1</name> <baseAddress>0x40088000</baseAddress> @@ -69856,6 +70351,21 @@ SPDX-License-Identifier: BSD-3-Clause <value>32</value> </interrupt> </peripheral> + <peripheral derivedFrom="SPI1"> + <name>SPI1_XOR</name> + <description>Atomic XOR alias view of SPI1 (+0x1000)</description> + <baseAddress>0x40089000</baseAddress> + </peripheral> + <peripheral derivedFrom="SPI1"> + <name>SPI1_SET</name> + <description>Atomic SET alias view of SPI1 (+0x2000)</description> + <baseAddress>0x4008A000</baseAddress> + </peripheral> + <peripheral derivedFrom="SPI1"> + <name>SPI1_CLR</name> + <description>Atomic CLR alias view of SPI1 (+0x3000)</description> + <baseAddress>0x4008B000</baseAddress> + </peripheral> <peripheral> <name>PIO0</name> <description>Programmable IO block</description> @@ -72775,6 +73285,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="PIO0"> + <name>PIO0_XOR</name> + <description>Atomic XOR alias view of PIO0 (+0x1000)</description> + <baseAddress>0x50201000</baseAddress> + </peripheral> + <peripheral derivedFrom="PIO0"> + <name>PIO0_SET</name> + <description>Atomic SET alias view of PIO0 (+0x2000)</description> + <baseAddress>0x50202000</baseAddress> + </peripheral> + <peripheral derivedFrom="PIO0"> + <name>PIO0_CLR</name> + <description>Atomic CLR alias view of PIO0 (+0x3000)</description> + <baseAddress>0x50203000</baseAddress> + </peripheral> <peripheral derivedFrom="PIO0"> <name>PIO1</name> <baseAddress>0x50300000</baseAddress> @@ -72787,6 +73312,21 @@ SPDX-License-Identifier: BSD-3-Clause <value>18</value> </interrupt> </peripheral> + <peripheral derivedFrom="PIO1"> + <name>PIO1_XOR</name> + <description>Atomic XOR alias view of PIO1 (+0x1000)</description> + <baseAddress>0x50301000</baseAddress> + </peripheral> + <peripheral derivedFrom="PIO1"> + <name>PIO1_SET</name> + <description>Atomic SET alias view of PIO1 (+0x2000)</description> + <baseAddress>0x50302000</baseAddress> + </peripheral> + <peripheral derivedFrom="PIO1"> + <name>PIO1_CLR</name> + <description>Atomic CLR alias view of PIO1 (+0x3000)</description> + <baseAddress>0x50303000</baseAddress> + </peripheral> <peripheral derivedFrom="PIO0"> <name>PIO2</name> <baseAddress>0x50400000</baseAddress> @@ -72799,6 +73339,21 @@ SPDX-License-Identifier: BSD-3-Clause <value>20</value> </interrupt> </peripheral> + <peripheral derivedFrom="PIO2"> + <name>PIO2_XOR</name> + <description>Atomic XOR alias view of PIO2 (+0x1000)</description> + <baseAddress>0x50401000</baseAddress> + </peripheral> + <peripheral derivedFrom="PIO2"> + <name>PIO2_SET</name> + <description>Atomic SET alias view of PIO2 (+0x2000)</description> + <baseAddress>0x50402000</baseAddress> + </peripheral> + <peripheral derivedFrom="PIO2"> + <name>PIO2_CLR</name> + <description>Atomic CLR alias view of PIO2 (+0x3000)</description> + <baseAddress>0x50403000</baseAddress> + </peripheral> <peripheral> <name>BUSCTRL</name> <description>Register block for busfabric control signals and performance counters</description> @@ -74094,6 +74649,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="BUSCTRL"> + <name>BUSCTRL_XOR</name> + <description>Atomic XOR alias view of BUSCTRL (+0x1000)</description> + <baseAddress>0x40069000</baseAddress> + </peripheral> + <peripheral derivedFrom="BUSCTRL"> + <name>BUSCTRL_SET</name> + <description>Atomic SET alias view of BUSCTRL (+0x2000)</description> + <baseAddress>0x4006A000</baseAddress> + </peripheral> + <peripheral derivedFrom="BUSCTRL"> + <name>BUSCTRL_CLR</name> + <description>Atomic CLR alias view of BUSCTRL (+0x3000)</description> + <baseAddress>0x4006B000</baseAddress> + </peripheral> <peripheral> <name>SIO</name> <description>Single-cycle IO block @@ -76679,6 +77249,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="BOOTRAM"> + <name>BOOTRAM_XOR</name> + <description>Atomic XOR alias view of BOOTRAM (+0x1000)</description> + <baseAddress>0x400e1000</baseAddress> + </peripheral> + <peripheral derivedFrom="BOOTRAM"> + <name>BOOTRAM_SET</name> + <description>Atomic SET alias view of BOOTRAM (+0x2000)</description> + <baseAddress>0x400e2000</baseAddress> + </peripheral> + <peripheral derivedFrom="BOOTRAM"> + <name>BOOTRAM_CLR</name> + <description>Atomic CLR alias view of BOOTRAM (+0x3000)</description> + <baseAddress>0x400e3000</baseAddress> + </peripheral> <peripheral> <name>CORESIGHT_TRACE</name> <description>Coresight block - RP specific registers</description> @@ -80055,6 +80640,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="USB"> + <name>USB_XOR</name> + <description>Atomic XOR alias view of USB (+0x1000)</description> + <baseAddress>0x50111000</baseAddress> + </peripheral> + <peripheral derivedFrom="USB"> + <name>USB_SET</name> + <description>Atomic SET alias view of USB (+0x2000)</description> + <baseAddress>0x50112000</baseAddress> + </peripheral> + <peripheral derivedFrom="USB"> + <name>USB_CLR</name> + <description>Atomic CLR alias view of USB (+0x3000)</description> + <baseAddress>0x50113000</baseAddress> + </peripheral> <peripheral> <name>TRNG</name> <description>ARM TrustZone RNG register block</description> @@ -80603,6 +81203,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="TRNG"> + <name>TRNG_XOR</name> + <description>Atomic XOR alias view of TRNG (+0x1000)</description> + <baseAddress>0x400F1000</baseAddress> + </peripheral> + <peripheral derivedFrom="TRNG"> + <name>TRNG_SET</name> + <description>Atomic SET alias view of TRNG (+0x2000)</description> + <baseAddress>0x400F2000</baseAddress> + </peripheral> + <peripheral derivedFrom="TRNG"> + <name>TRNG_CLR</name> + <description>Atomic CLR alias view of TRNG (+0x3000)</description> + <baseAddress>0x400F3000</baseAddress> + </peripheral> <peripheral> <name>GLITCH_DETECTOR</name> <description>Glitch detector controls</description> @@ -80812,6 +81427,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="GLITCH_DETECTOR"> + <name>GLITCH_DETECTOR_XOR</name> + <description>Atomic XOR alias view of GLITCH_DETECTOR (+0x1000)</description> + <baseAddress>0x40159000</baseAddress> + </peripheral> + <peripheral derivedFrom="GLITCH_DETECTOR"> + <name>GLITCH_DETECTOR_SET</name> + <description>Atomic SET alias view of GLITCH_DETECTOR (+0x2000)</description> + <baseAddress>0x4015A000</baseAddress> + </peripheral> + <peripheral derivedFrom="GLITCH_DETECTOR"> + <name>GLITCH_DETECTOR_CLR</name> + <description>Atomic CLR alias view of GLITCH_DETECTOR (+0x3000)</description> + <baseAddress>0x4015B000</baseAddress> + </peripheral> <peripheral> <name>OTP</name> <description>SNPS OTP control IF (SBPI and RPi wrapper control)</description> @@ -100247,6 +100877,21 @@ SPDX-License-Identifier: BSD-3-Clause </register> </registers> </peripheral> + <peripheral derivedFrom="TBMAN"> + <name>TBMAN_XOR</name> + <description>Atomic XOR alias view of TBMAN (+0x1000)</description> + <baseAddress>0x40161000</baseAddress> + </peripheral> + <peripheral derivedFrom="TBMAN"> + <name>TBMAN_SET</name> + <description>Atomic SET alias view of TBMAN (+0x2000)</description> + <baseAddress>0x40162000</baseAddress> + </peripheral> + <peripheral derivedFrom="TBMAN"> + <name>TBMAN_CLR</name> + <description>Atomic CLR alias view of TBMAN (+0x3000)</description> + <baseAddress>0x40163000</baseAddress> + </peripheral> <peripheral> <name>USB_DPRAM</name> <description>DPRAM layout for USB device.</description> ``` </details> Open to suggestions for it! I don't think finding all the aliases will be terribly difficult (especially for you internally I'm just guessing based on the spec with limited experience).

lurch commented 2026-02-12 07:20:55 -06:00 (Migrated from github.com)

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It says "for example, GPIO" but I cannot find any other examples

I believe that's referring to "The OUT and OE registers also have atomic SET , CLR , and XOR aliases. This allows software to update a subset of the pins in one operation. This ensures safety for concurrent GPIO access, both between the two cores and between a single core’s interrupt handler and foreground code." (in section 3.1.3. of the RP2350 datasheet).

If you look at the list of SIO registers there's explicit GPIO_OUT_SET, GPIO_OUT_CLR and GPIO_OUT_XOR etc. registers, and also DOORBELL_OUT_SET, DOORBELL_OUT_CLR etc.

But this is reaching the limits of my knowledge, so I'll shut up now and wait for somebody more knowledgeable to comment 😉

> It says "for example, GPIO" but I cannot find any other examples I believe that's referring to "The OUT and OE registers also have atomic SET , CLR , and XOR aliases. This allows software to update a subset of the pins in one operation. This ensures safety for concurrent GPIO access, both between the two cores and between a single core’s interrupt handler and foreground code." (in section 3.1.3. of the RP2350 datasheet). If you look at the list of SIO registers there's explicit `GPIO_OUT_SET`, `GPIO_OUT_CLR` and `GPIO_OUT_XOR` etc. registers, and also `DOORBELL_OUT_SET`, `DOORBELL_OUT_CLR` etc. But this is reaching the limits of my knowledge, so I'll shut up now and wait for somebody more knowledgeable to comment 😉

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