add an sha1_mb assembly implementation with vector extension for riscv64 #177
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gh-intel/isa-l_crypto!177
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Delete branch "HeliC829/rvv-sha1_mb"
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Origin C implementation:
Assembly implementation with vector extension :
@sunyuechi could you review this PR? Thanks for your help reviewing all these RISC-V PRs :)
@pablodelara Talked with the author; we'll wait for them to fix things along the lines of #168 first, since many issues are likely similar.
Hi Pablo, can you trigger CI again? I can't reproduce the failure on my board or the CI machine.
I did and the issue is still present.
Thanks! Now I get enough info from our CI board, and I will try to resolve it.
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